ZHCSM95B July 2021 – May 2022 CDCDB800
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.5 Programming
The CDCDB800 uses SMBus to program the states of its eight output drivers. See Section 8.3.3 for more information on the SMBus programming, and Section 8.6 for information on the registers.
Table 8-2 Command Code
Definition
| BIT | DESCRIPTION |
|---|---|
| 7 | 0 = Block Read or Block Write
operation 1 = Byte Read or Byte Write operation |
| (6:0) | Register address for Byte operations, or starting register address for Block, operations |
Figure 8-2 Generic Programming Sequence
Figure 8-3 Byte
Write Protocol
Figure 8-4 Byte Read Protocol
Figure 8-5 Block
Write Protocol
Figure 8-6 Block Read Protocol
Figure 8-7 SMBus Timing Diagram