ZHCSUH0G August 2007 – January 2024 CDCE949 , CDCEL949
PRODUCTION DATA
The device supports Byte Write and Byte Read and Block Write and Block Read operations.
For Byte Write/Read operations, the system controller can individually access addressed bytes.
For Block Write/Read operations, the bytes are accessed in sequential order from lowest to highest byte (with most significant bit first) with the ability to stop after any complete byte has been transferred. The numbers of Bytes read-out are defined by Byte Count in the Generic Configuration Register. At Block Read instruction all bytes defined in the Byte Count has to be readout to correctly finish the read cycle.
After a byte is sent, the byte is written into the internal register and is effective immediately. This applies to each transferred byte independent of whether this is a Byte Write or a Block Write sequence.
If the EEPROM Write Cycle is initiated, the internal SDA register contents are written into the EEPROM. During this write cycle, data is not accepted at the SDA/SCL bus until the write cycle is completed. However, data can be read during the programming sequence (Byte Read or Block Read). The programming status can be monitored by reading EEPIP, Byte 01–Bit [6].
The offset of the indexed byte is encoded in the command code, as described in Table 7-5.
DEVICE | A6 | A5 | A4 | A3 | A2 | A1(1) | A0(1) | R/ W |
---|---|---|---|---|---|---|---|---|
CDCEx913 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1/0 |
CDCEx925 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 1/0 |
CDCEx937 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1/0 |
CDCEx949 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1/0 |