ZHCSTF3I June 2007 – August 2024 CDCE913 , CDCEL913
PRODUCTION DATA
The device supports Byte Write and Byte Read and Block Write and Block Read operations.
For Byte Write/Read operations, the system controller can individually access addressed bytes.
For Block Write/Read operations, the bytes are accessed in sequential order from lowest to highest byte (with most-significant bit first) with the ability to stop after any complete byte has been transferred. The numbers of bytes read out are defined by Byte Count in the generic configuration register. At the Block Read instruction, all bytes defined in Byte Count must be read out to finish the read cycle correctly.
After a byte has been sent, the byte is written into the internal register and is effective immediately. This applies to each transferred byte, regardless of whether this is a Byte Write or a Block Write sequence.
If the EEPROM write cycle is initiated, the internal registers are written into the EEPROM. Data can be read out during the programming sequence (Byte Read or Block Read). The programming status can be monitored by EEPIP, byte 01h–bit 6. Before beginning EEPROM programming, pull CLKIN LOW. CLKIN must be held LOW for the duration of EEPROM programming. After initiating EEPROM programming with EEWRITE, byte 06h-bit 0, do not write to the device registers until EEPIP is read back as a 0.
The offset of the indexed byte is encoded in the command code, as described in Table 7-8.
DEVICE | A6 | A5 | A4 | A3 | A2 | A1(1) | A0(1) | R/ W |
---|---|---|---|---|---|---|---|---|
CDCE913/CDCEL913 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1/0 |
CDCE925/CDCEL925 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 1/0 |
CDCE937/CDCEL937 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1/0 |
CDCE949/CDCEL949 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1/0 |