ZHCSTF3I June 2007 – August 2024 CDCE913 , CDCEL913
PRODUCTION DATA
STANDARD MODE | FAST MODE | UNIT | ||||
---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | |||
fSCL | SCL clock frequency | 0 | 100 | 0 | 400 | kHz |
tsu(START) | START setup time (SCL high before SDA low) | 4.7 | 0.6 | μs | ||
th(START) | START hold time (SCL low after SDA low) | 4 | 0.6 | μs | ||
tw(SCLL) | SCL low-pulse duration | 4.7 | 1.3 | μs | ||
tw(SCLH) | SCL high-pulse duration | 4 | 0.6 | μs | ||
th(SDA) | SDA hold time (SDA valid after SCL low) | 0 | 3.45 | 0 | 0.9 | μs |
tsu(SDA) | SDA setup time | 250 | 100 | ns | ||
tr | SCL/SDA input rise time | 1000 | 300 | ns | ||
tf | SCL/SDA input fall time | 300 | 300 | ns | ||
tsu(STOP) | STOP setup time | 4 | 0.6 | μs | ||
tBUS | Bus free time between a STOP and START condition | 4.7 | 1.3 | μs |