SCAS841D February 2007 – December 2016 CDCLVD110A
PRODUCTION DATA.
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| CK | 1 | I | Control register input clock, features a 120-kΩ pullup resistor |
| CLK0 | 3 | I | True differential input, LVDS |
| CLK0 | 4 | I | Complementary differential input, LVDS |
| CLK1 | 6 | I | True differential input, LVDS |
| CLK1 | 7 | I | Complementary differential input, LVDS |
| EN | 8 | I | Control enable (for programmability), features a 120-kΩ pulldown resistor, input |
| PowerPAD™ | — | I/O | The PowerPAD of the VQFN package is thermally connected to the die to improve the heat transfer out of the package. This pad is connected to GND. |
| Q[9:0] | 11, 13, 15, 18, 20, 22, 24, 27, 29, 31 |
O | Clock outputs, these outputs provide low-skew copies of CLKIN |
| Q[9:0] | 10, 12, 14, 17, 19, 21,23, 26, 28, 30 |
O | Complementary clock outputs, these outputs provide low-skew copies of CLKIN |
| SI | 2 | I | Control register serial input/CLK Select, features a 120-kΩ pulldown resistor |
| VBB | 5 | O | Reference voltage output |
| VDD | 16, 32 | — | Supply voltage |
| VSS | 9, 25 | — | Device ground |