SCAS886E August   2009  – December 2015 CDCLVP1212

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: LVCMOS Input
    6. 7.6  Electrical Characteristics: Differential Input
    7. 7.7  Electrical Characteristics: LVPECL Output, At VCC = 2.375 V to 2.625 V
    8. 7.8  Electrical Characteristics: LVPECL Output, at VCC = 3.0 V to 3.6 V
    9. 7.9  Pin Characteristics
    10. 7.10 Timing Requirements
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Test Configurations
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 LVPECL Output Termination
      2. 9.4.2 Input Termination
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Fanout Buffer for Line Card Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Thermal Management
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Community Resources
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

40 Pin
RHA Package
Top View
CDCLVP1212 po_cas886.gif
1. Thermal pad must be soldered to ground.

Pin Functions

PIN TYPE PULL-UP/
PULLDOWN		 DESCRIPTION
NAME NUMBER
VCC 5, 6, 11, 20, 31, 40 Power — 2.5-V to 3.3-V supplies for the device
GND 21, 30 Ground — Device grounds
INP0, INN0 9, 8 Input — Differential input pair or single-ended input. Unused input pair can be left floating.
INP1, INN1 2, 3 Input — Redundant differential input pair or single-ended input. Unused input pair can be left floating.
OUTP11, OUTN11 38, 39 Output — Differential LVPECL output pair no. 11. Unused output pair can be left floating.
OUTP10, OUTN10 36, 37 Output — Differential LVPECL output pair no. 10. Unused output pair can be left floating.
OUTP9, OUTN9 34, 35 Output — Differential LVPECL output pair no. 9. Unused output pair can be left floating.
OUTP8, OUTN8 32, 33 Output — Differential LVPECL output pair no. 8. Unused output pair can be left floating.
OUTP7, OUTN7 28, 29 Output — Differential LVPECL output pair no. 7. Unused output pair can be left floating.
OUTP6, OUTN6 26, 27 Output — Differential LVPECL output pair no. 6. Unused output pair can be left floating.
OUTP5, OUTN5 24, 25 Output — Differential LVPECL output pair no. 5. Unused output pair can be left floating.
OUTP4, OUTN4 22, 23 Output — Differential LVPECL output pair no. 4. Unused output pair can be left floating.
OUTP3, OUTN3 18, 19 Output — Differential LVPECL output pair no. 3. Unused output pair can be left floating.
OUTP2, OUTN2 16, 17 Output — Differential LVPECL output pair no. 2. Unused output pair can be left floating.
OUTP1, OUTN1 14, 15 Output — Differential LVPECL output pair no. 1. Unused output pair can be left floating.
OUTP0 OUTN0 12, 13 Output — Differential LVPECL output pair no. 0. Unused output pair can be left floating.
IN_SEL 1 Input Pulldown
(see Pin Characteristics)		 MUX select input for input choice (see Table 1)
VAC_REF 7 Output — Bias voltage output for capacitive coupled inputs. Do not use VAC_REF at VCC < 3.0 V. If used, it is recommended to use a 0.1-μF capacitor to GND on this terminal. The output current is limited to 2 mA.
NC 4, 10 — — Do not connect

Table 1. Input Selection Table

IN_SEL ACTIVE CLOCK INPUT
0 INP0, INN0
1 INP1, INN1
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