米6体育平台手机版

ZHCS132E March 2011 – February 2017 CSD87351Q5D

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机械数据 (封装 | 引脚)

DQY|8

散热焊盘机械数据 (封装 | 引脚)

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5 Specifications

5.1 Absolute Maximum Ratings

T_A = 25°C (unless otherwise noted)⁽¹⁾

PARAMETER		CONDITIONS	MIN	MAX	UNIT
	Voltage	V_IN to P_GND	–0.8	30	V
		T_G to T_GR	–8	10
		B_G to P_GND	–8	10
I_DM⁽²⁾	Pulsed current rating		96		A
P_D	Power dissipation		12		W
E_AS	Avalanche energy	Sync FET, I_D = 87 A, L = 0.1 mH	378		mJ
E_AS	Avalanche energy	Control FET, I_D = 44 A, L = 0.1 mH	87		mJ
T_J	Operating junction		–55	150	°C
T_STG	Storage temperature		–55	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Pulse duration ≤ 50 µs. Duty cycle ≤ 0.01%.

5.2 Recommended Operating Conditions

T_A = 25°C (unless otherwise noted)

PARAMETER		CONDITIONS	MIN	MAX	UNIT
V_GS	Gate drive voltage		4.5	8	V
V_IN	Input supply voltage			27	V
ƒ_SW	Switching frequency	C_BST = 0.1 μF (min)	200	1500	kHz
	Operating current			32	A
T_J	Operating temperature			125	°C

5.3 Power Block Performance

T_A = 25°C (unless otherwise noted)

PARAMETER		CONDITIONS	MIN	TYP	MAX	UNIT
P_LOSS ⁽¹⁾	Power loss	V_IN = 12 V, V_GS = 5 V, V_OUT = 1.3 V, I_OUT = 20 A, ƒ_SW = 500 kHz, L_OUT = 0.3 µH, T_J = 25°C		2.5		W
I_QVIN	V_IN quiescent current	T_G to T_GR = 0 V B_Gto P_GND = 0 V		10		µA

(1) Measurement made with six 10-µF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across V_IN to P_GND pins and using a high-current 5-V driver IC.

5.4 Thermal Information

T_A = 25°C (unless otherwise stated)

THERMAL METRIC		MAX	UNIT
R_θJA	Junction-to-ambient thermal resistance (min Cu)⁽¹⁾⁽²⁾	119	°C/W
R_θJA	Junction-to-ambient thermal resistance (max Cu)⁽¹⁾⁽²⁾	62	°C/W
R_θJC	Junction-to-case thermal resistance (top of package)⁽²⁾	25	°C/W
R_θJC	Junction-to-case thermal resistance (P_GND pin)⁽²⁾	2.3	°C/W

(1) Device mounted on FR4 material with 1-in² (6.45-cm²) Cu.

(2) R_θJC is determined with the device mounted on a 1-in² (6.45-cm²), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in
(3.81-cm × 3.81-cm), 0.06-in (1.52-mm) thick FR4 board. R_θJC is specified by design while R_θJA is determined by the user’s board design.

5.5 Electrical Characteristics

T_A = 25°C (unless otherwise stated)

PARAMETER		TEST CONDITIONS	Q1 Control FET			Q2 Sync FET
PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-source voltage	V_GS = 0 V, I_DS = 250 μA	30			30			V
I_DSS	Drain-to-source leakage current	V_GS = 0 V, V_DS = 24 V			1			1	μA
I_GSS	Gate-to-source leakage current	V_DS = 0 V, V_GS = +10 / –8			100			100	nA
V_GS(th)	Gate-to-source threshold voltage	V_DS = V_GS, I_DS = 250 μA	1.0		2.1	0.75		1.15	V
Z_DS(on)⁽¹⁾	Effective AC on-impedance	V_IN = 12 V, V_GS = 5 V, V_OUT = 1.3 V, I_OUT = 20 A, ƒ_SW = 500 kHz, L_OUT = 0.3 µH,		7.4			1.6		mΩ
g_fs	Transconductance	V_DS = 15 V, I_DS = 20 A		75			142		S
DYNAMIC CHARACTERISTICS
C_ISS	Input capacitance	V_GS = 0 V, V_DS = 15 V, ƒ = 1 MHz		966	1255		2410	3133	pF
C_OSS	Output capacitance			382	497		1130	1469	pF
C_RSS	Reverse transfer capacitance			19	25		45	59	pF
R_G	Series gate resistance			0.9	1.8		1	2	Ω
Q_g	Gate charge total (4.5 V)	V_DS = 15 V, I_DS = 20 A		5.9	7.7		17	22	nC
Q_gd	Gate charge gate-to-drain			1.1			3.1		nC
Q_gs	Gate charge gate-to-source			2.1			3.7		nC
Q_g(th)	Gate charge at Vth			1.1			2		nC
Q_OSS	Output charge	V_DS = 9.8 V, V_GS = 0 V		6.5			23		nC
t_d(on)	Turnon delay time	V_DS = 15 V, V_GS = 4.5 V, I_DS = 20 A, R_G = 2 Ω		6.1			7.7		ns
t_r	Rise time			16			10		ns
t_d(off)	Turnoff delay time			10			31		ns
t_f	Fall time			2.1			4.2		ns
DIODE CHARACTERISTICS
V_SD	Diode forward voltage	I_DS = 20 A, V_GS = 0 V		0.86	1		0.78	1	V
Q_rr	Reverse recovery charge	V_dd = 9.8 V, I_F = 20 A, di/dt = 300 A/μs		8.6			23		nC
t_rr	Reverse recovery time	V_dd = 9.8 V, I_F = 20 A, di/dt = 300 A/μs		16			24		ns

(1) Equivalent system performance based on application testing. See Application and Implementation details.

Max R_θJA = 62°C/W when mounted on 1 in² (6.45 cm²) of 2-oz (0.071-mm) thick Cu.

Max R_θJA = 119°C/W when mounted on minimum pad area of 2-oz (0.071-mm) thick Cu.

5.6 Typical Power Block Device Characteristics

T_J = 125°C, unless stated otherwise

Figure 1. Power Loss vs Output Current

Figure 3. Safe Operating Area – PCB Vertical Mount⁽¹⁾1

Figure 5. Typical Safe Operating Area⁽¹⁾1

Figure 2. Normalized Power Loss vs Temperature

Figure 4. Safe Operating Area – PCB Horizontal Mount⁽¹⁾1

1. The typical power block system characteristic curves are based on measurements made on a PCB design with dimensions of 4 in (W) × 3.5 in (L) × 0.062 in (H) and 6 copper layers of 1-oz copper thickness. See Application and Implementation for detailed explanation.