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ZHCSAY0D March 2013 – April 2015 CSD87588N

PRODUCTION DATA.

封装选项

机械数据 (封装 | 引脚)

MPA|5

散热焊盘机械数据 (封装 | 引脚)

订购信息

6 Application and Implementation

6.1 Application Information

The CSD87588N NexFET power block is an optimized design for synchronous buck applications using 5 V gate drive. The Control FET and Sync FET silicon are parametrically tuned to yield the lowest power loss and highest system efficiency. As a result, a new rating method is needed which is tailored toward a more systems-centric environment. System-level performance curves such as Power Loss, Safe Operating Area, and normalized graphs allow engineers to predict the product performance in the actual application.

6.1.1 Power Loss Curves

MOSFET-centric parameters such as R_DS(ON) and Q_gd are needed to estimate the loss generated by the devices. To simplify the design process for engineers, TI has provided measured power loss performance curves. Figure 1 plots the power loss of the CSD87588N as a function of load current. This curve is measured by configuring and running the CSD87588N as it would be in the final application (see Figure 27). The measured power loss is the CSD87588N loss and consists of both input conversion loss and gate drive loss. Equation 1 is used to generate the power loss curve.

Equation 1. (V_IN × I_IN) + (V_DD × I_DD) – (V_{SW_AVG} × I_OUT) = Power Loss

The power loss curve in Figure 1 is measured at the maximum recommended junction temperatures of 125°C under isothermal test conditions.

6.1.2 Safe Operating Curves (SOA)

The SOA curves in the CSD87588N data sheet provide guidance on the temperature boundaries within an operating system by incorporating the thermal resistance and system power loss. Figure 3 to Figure 4 outline the temperature and airflow conditions required for a given load current. The area under the curve dictates the safe operating area. All the curves are based on measurements made on a PCB design with dimensions of 4 inches (W) × 3.5 inches (L) × 0.062 inch (T) and 6 copper layers of 1 oz. copper thickness.

6.1.3 Normalized Curves

The normalized curves in the CSD87588N data sheet provides guidance on the Power Loss and SOA adjustments based on their application-specific needs. These curves show how the power loss and SOA boundaries adjust for a given set of systems conditions. The primary y-axis is the normalized change in power loss and the secondary y-axis is the change in system temperature required in order to comply with the SOA curve. The change in power loss is a multiplier for the Power Loss curve and the change in temperature is subtracted from the SOA curve.

Figure 27. Typical Application

6.1.4 Calculating Power Loss and SOA

The user can estimate product loss and SOA boundaries by arithmetic means (see Design Example). Though the Power Loss and SOA curves in this data sheet are taken for a specific set of test conditions, the following procedure outlines the steps the user should take to predict product performance for any set of system conditions.

6.1.4.1 Design Example

Operating Conditions:

Output Current = 15 A
Input Voltage = 7 V
Output Voltage = 1 V
Switching Frequency = 800 kHz
Inductor = 0.2 µH

6.1.4.2 Calculating Power Loss

Power Loss at 15 A = 2.75 W (Figure 1)
Normalized Power Loss for input voltage ≈ 1.03 (Figure 6)
Normalized Power Loss for output voltage ≈ 0.94 (Figure 7)
Normalized Power Loss for switching frequency ≈ 1.08 (Figure 5)
Normalized Power Loss for output inductor ≈ 1.03 (Figure 8)
Final calculated Power Loss = 2.75 W × 1.05 × 0.95 × 1.05 × 1.05 ≈ 3.02 W

6.1.4.3 Calculating SOA Adjustments

SOA adjustment for input voltage ≈ 0.3ºC (Figure 6)
SOA adjustment for output voltage ≈ –0.5ºC (Figure 7)
SOA adjustment for switching frequency ≈ 0.7ºC (Figure 5)
SOA adjustment for output inductor ≈ 0.3ºC (Figure 8)
Final calculated SOA adjustment = 0.3 + (–0.5) + 0.7 + 0.3 ≈ 0.8ºC

In the previous design example, the estimated power loss of the CSD87588N would increase to 3.02 W. In addition, the maximum allowable board and/or ambient temperature would have to decrease by 0.8ºC. Figure 28 graphically shows how the SOA curve would be adjusted accordingly.

Start by drawing a horizontal line from the application current to the SOA curve.
Draw a vertical line from the SOA curve intercept down to the board/ambient temperature.
Adjust the SOA board/ambient temperature by subtracting the temperature adjustment value.

In the design example, the SOA temperature adjustment yields a reduction in allowable board/ambient temperature of 0.8ºC. In the event the adjustment value is a negative number, subtracting the negative number would yield an increase in allowable board/ambient temperature.

Figure 28. Power Block SOA