SLPS670 June 2017 CSD95480RWJ
PRODUCTION DATA.
5 Pin Configuration and Functions
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Pin Functions
| PIN | DESCRIPTION | |
|---|---|---|
| NAME | NUMBER | |
| VOS | 1 | Output voltage sensing pin for the internal current sensing circuitry. |
| AGND | 2 | This pin is internally connected to PGND. |
| VDD | 3 | Supply voltage for internal circuitry. This pin should be bypassed directly to pin 2. |
| PVDD | 4 | Supply voltage for gate drivers. This pin should be bypassed to PGND. |
| PGND | 5 | Power ground. |
| NC | 6 | Not connected. This pin needs to be left floating in application. |
| PGND | 7-9 | Power ground. |
| VSW | 10-19 | Phase node connecting the HS MOSFET source and LS MOSFET drain – pin connection to the output inductor. |
| PGND | 20-24 | Power ground. |
| VIN | 25-30 | Input voltage pin. Connect input capacitors close to this pin. |
| NC | 31 | Not connected. This pin needs to be left floating in application. |
| BOOTR | 32 | Return path for HS gate driver. It is connected to VSW internally. |
| BOOT | 33 | Bootstrap capacitor connection. Connect a minimum 0.1-µF, 16-V, X5R ceramic capacitor from BOOT to BOOTR pins. The bootstrap capacitor provides the charge to turn on the control FET. The bootstrap diode is integrated. |
| PWM | 34 | Tri-state input from external controller. Logic low sets control FET gate low and sync FET gate high. Logic high sets control FET gate high and sync FET gate low. Both MOSFET gates are set low if PWM stays in Hi-Z for greater than the tri-state shutdown holdoff time (T3HT). |
| EN/FCCM | 35 | This dual function pin either enables the diode emulation function or can be used as a simple enable for the device. When this pin is driven into the tri-state window and held there for more than the tri-state holdoff time, diode emulation mode is enabled for sync FET. When the pin is high, device operates in forced continuous conduction mode. When the pin is low, both FETs are held off. An internal resistor pulls this pin low if left floating. |
| TAO/FLT | 36 | Temperature amplifier output. Reports a voltage proportional to the IC temperature. An ORing diode is integrated in the IC. When used in multiphase application, a single wire can be used to connect the TAO pins of all the ICs. Only the highest temperature will be reported. TAO will be pulled up to 3.3 V if thermal shutdown LSOC or HSS detection circuit is tripped. |
| LSET | 37 | A resistor from this pin to PGND pin sets the inductor value for the internal current sensing circuitry. |
| IOUT | 38 | Output of current sensing amplifier. V(IOUT) – V(REFIN) is proportional to the phase current. |
| REFIN | 39 | External reference voltage input for current sensing amplifier. |
| PGND | 40 | Power ground. |
| NC | 41 | Not connected. This pin needs to be left floating in application. |