4 修订历史记录
Changes from C Revision (July 2013) to D Revision
- Added description of internal connection to pin 7 in the Pin Functions tableGo
- Added ESD Ratings tableGo
- Added a NOTE to the Application and Implementation sectionGo
- Added Layout sectionGo
- Added 添加了器件和文档支持 部分Go
- Changed 将机械数据 部分更改成了机械封装和可订购信息 部分Go
Changes from B Revision (May 2013) to C Revision
Changes from A Revision (March 2013) to B Revision
- 更改了机械制图图像Go
- 更改了推荐 PCB 焊盘布局图案Go
- 更改了推荐模版开孔图案Go
Changes from * Revision (January 2013) to A Revision
- Changed the ROC table, From: VSW to PGND, VIN to VSW (<20ns) MIN = -5 To: VSW to PGND, VIN to VSW (<10ns) MIN = -7Go
- Changed the ROC table, From: BOOT to PGND (<20ns) MIN = -3 To: BOOT to PGND (<10ns) MIN = -2Go
- Changed Logic Level High, VIH From: MAX = 2.6 To: MIN = 2.65Go
- Changed Logic Level Low, VIL From: MIN = 0.6 To: MAX = 0.6Go
- Changed Tri-State Voltage, VTS From: MIN = 1.2 To: MIN = 1.3Go