ZHCSEO3B April 2012 – January 2016 DAC101C081 , DAC101C081Q , DAC101C085
PRODUCTION DATA.
- 1 特性
- 2 应用
- 3 说明
- 4 修订历史记录
- 5 说明 （续）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
- 9 Detailed Description
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13器件和文档支持
- 14机械、封装和可订购信息
7 Pin Configuration and Functions
NGF Package
6-Pin WSON
Top View
DDC Package
6-Lead SOT
Top View
DGK Package
8-Lead VSSOP
Top View
Pin Functions
| PIN | TYPE | EQUIVALENT CIRCUIT | DESCRIPTION | |||
|---|---|---|---|---|---|---|
| NAME | WSON | SOT | VSSOP | |||
| ADR0 | 1 | 6 | 1 | Digital Input, three levels |
 |
Tri-state Address Selection Input. Sets the two Least Significant Bits (A1 and A0) of the 7-bit slave address. (see Table 1) |
| ADR1 | — | — | 2 | Digital Input, three levels |
Tri-State Address Selection Input. Sets Bits A6 and A3 of the 7-bit slave address. (see Table 1) | |
| GND | 4 | 3 | 5 | Ground | Ground for all on-chip circuitry | |
| PAD | PAD | — | — | Ground | Exposed die attach pad can be connected to ground or left floating. Soldering the pad to the PCB offers optimal thermal performance and enhances package self-alignment during reflow. | |
| SCL | 2 | 5 | 3 | Digital Input |  |
Serial Clock Input. SCL is used together with SDA to control the transfer of data in and out of the device. |
| SDA | 3 | 4 | 4 | Digital Input/Output |
Serial Data bi-directional connection. Data is clocked into or out of the internal 16-bit register relative to the clock edges of SCL. This is an open drain data line that must be pulled to the supply (VA) by an external pullup resistor. | |
| VA | 5 | 2 | 6 | Supply | Power supply input. For the SOT and WSON versions, this supply is used as the reference. Must be decoupled to GND. | |
| VOUT | 6 | 1 | 8 | Analog Output | Analog Output Voltage | |
| VREF | — | — | 7 | Supply | Unbufferred reference voltage. For the VSSOP-8, this supply is used as the reference. VREF must be free of noise and decoupled to GND. | |