SNAS321G June 2005 – April 2016 DAC101S101 , DAC101S101-Q1
PRODUCTION DATA.
For best accuracy and minimum noise, the printed circuit board containing the DAC101S101 should have separate analog and digital areas. The areas are defined by the locations of the analog and digital power planes. Both of these planes should be located in the same board layer. There should be a single ground plane. A single ground plane is preferred if digital return current does not flow through the analog ground area. Frequently a single ground plane design will utilize a "fencing" technique to prevent the mixing of analog and digital ground current. Separate ground planes should only be utilized when the fencing technique is inadequate. The separate ground planes must be connected in one place, preferably near the DAC101S101. Special care is required to ensure that digital signals with fast edge rates do not pass over split ground planes. They must always have a continuous return path below their traces.
The DAC101S101 power supply should be bypassed with a 10-µF and a 0.1-µF capacitor as close as possible to the device with the 0.1-µF right at the device supply pin. The 10-µF capacitor should be a tantalum type and the 0.1-µF capacitor should be a low ESL, low ESR type. The power supply for the DAC101S101 should only be used for analog circuits.
Avoid crossover of analog and digital signals and keep the clock and data lines on the component side of the board. The clock and data lines should have controlled impedances.