11.1 Layout Guidelines

• DAC RF output traces
  • Single-ended 50 Ω co-planar wave guide for output traces is recommended.
  • Use short RF traces. Place DAC close to edge of PCB to shorten the length of output and clock traces. This helps to minimize PCB loss and coupling
  • Avoid width/spacing differences when entering a landing pad (eg. a balun) by tapering or by redefining width/space rules for the traces
• Power supply planes
  • Ensure sufficient lateral spacing between two power planes (about 3x the thickness of the plane is recommended)
  • Insert ground plane between adjacent power planes where possible
  Figure 156. Example Power Plane Routing
• Bypass Capacitors
  • Use bypass capacitors with in-pad vias and place between the pin and the power plane. Avoid sharing ground vias or pads of bypass caps used for different power rails
  • Minimize stubs on bypass capacitors to avoid parasitic inductance
  Figure 157. Bypass Capacitors Placed on the Power Supply Pin with In-pad Vias
• High speed SerDes traces
  • Route all SerDes traces straight and minimized sharp curves or serpentines. Route for best signal integrity
  • Some skew between SerDes traces can be tolerated. It is recommended to limit skew between traces to 320ps or less
  • Place ground planes between the SerDes traces for improved isolation
  Figure 158. Layout Example of High Speed SerDes Traces

11.2 Layout Example

Figure 159. Layout Example of DAC38RFxx