ZHCSQK5 May 2022 DAC53001 , DAC53002 , DAC63001 , DAC63002
PRODUCTION DATA
PMBus page address = X, PMBus register address = 78h
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
X | CML | X | N/A | ||||||||||||
X-00h | R/W-0h | X-0h | X-00h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-10 | X | X | 00h | Don't care |
9 | CML | R/W | 0h | 0: No communication fault 1: PMBus communication fault for write with incorrect number of clocks, read before write command, invalid command address, and invalid or unsupported data value; reset this bit by writing 1. |
8 | X | X | 0h | Don't care |
7-0 | X | X | 00h | Not applicable |