ZHCSM38 december 2020 DAC43701 , DAC53701
PRODUCTION DATA
The DACx3701 family of devices consists of string architecture with an output buffer amplifier. Section 8.2 shows the DAC architecture within the block diagram. This DAC architecture operates from a 1.8-V to 5.5-V power supply. These devices consume only 0.2 mA of current when using a 1.8-V power supply. The DAC output pin starts up in high-impedance mode, making these devices an excellent choice for power-supply control applications. To change the power-up mode to 10kΩ-GND, program the DAC_PDN bit (address: D1h), and load these bits in the device NVM. The DACx3701 devices include a smart feature set to enable processor-less operation and high-integration. The NVM enables a predictable startup. The GPI triggers the DAC output without the I2C interface in the absence of a processor or when the processor or software fails. The integrated functions and the FB pin enable PWM output for control applications. The FB pin enables this device to be used as a programmable comparator. The digital slew rate control and the Hi-Z power-down modes enable a hassle-free voltage margining and function.