ZHCSLO2E October 2020 – January 2021 DAC5652
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
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6 Specifications
- 6.1 Absolute Maximum Rationgs
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Resistance Characteristics
- 6.5 Electrical Characteristics
- 6.6 Electrical Characteristics
- 6.7 Electrical Characteristics, AC
- 6.8 Electrical Characteristics, DC
- 6.9 Switching Characteristics
- 6.10 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.3.1 DAC Transfer Function
Each of the DACs in the DAC5652 has a set of complementary current outputs, IOUT1 and IOUT2. The full-scale output current, IOUTFS, is the summation of the two complementary output currents:
The individual output currents depend on the DAC code and can be expressed as:
where Code is the decimal representation of the DAC data input word. Additionally, IOUTFS is a function of the reference current IREF, which is determined by the reference voltage and the external setting resistor (RSET).
In most cases, the complementary outputs drive resistive loads or a terminated transformer. A signal voltage develops at each output according to:
The value of the load resistance is limited by the output compliance specification of the DAC5652. To maintain specified linearity performance, the voltage for IOUT1 and IOUT2 must not exceed the maximum allowable compliance range.
The total differential output voltage is:
