Table 12. Design Parameters

8.2.2.1 Power-Supply Bypassing

For accurate, high-resolution performance, all power supply pins should be bypassed to ground with low ESR ceramic bypass capacitors. For additional noise filtering, use a 10-µF capacitor in parallel with a 0.1-µF capacitor.

8.2.2.2 Reference Input

The internal reference buffers of the DAC60096 device require an external 2.5-V reference voltage source, which can be driven externally through a precision voltage source or generated from a high precision voltage IC. One such integrated circuit is the REF5025, which is a low-noise, low-drift, high precision voltage reference. The basic connections are listed in Figure 50. A supply bypass capacitor ranging between 1 µF to 10 µF is recommended. A 1-µF to 50-µF output capacitor must be connected from V_OUT to GND. The ESR value of the output capacitor must be less than or equal to 1.5 Ω to ensure output stability. To help minimize noise, an additional 1-µF capacitor is connected from TRIM/NR to GND.

8.2.2.3 TRIGG/Signal Conditioning

The TRIGG input signal provides the square waveform required for the DAC60096 device to operate as a square-wave generator. The DAC registers are prepared for square wave operation on a TRIGG rising edge and the outputs toggle on the falling edge. The Timing Requirements table specifies the timing parameters required for proper operation.

The TRIGG input signal can be supplied from a waveform generator or voltage-to-frequency converter. An example device with schematic is provided in Figure 51. The device highlighted is the LM231, a precision voltage-to-frequency converter with wide range of full-scale frequency (1 Hz to 100 kHz). In Figure 51 the device is configured to display 0.05% linearity over an output frequency range of 10 Hz to 4 kHz with and input range of 25 mV to 12.5 V. For more information, refer to the Typical Applications section of the LM231 datasheet (SNOSBI2).

Figure 51. External Precision Voltage-to-Frequency Converter for TRIGG Signal

8.2.2.4 External Amplifier Selection

The outputs of the DAC60096 are unbuffered. The output impedance is specified as 41 kΩ. In applications requiring an external buffer, the selected amplifier should exhibit both low-offset voltage and input bias current. The input bias current of the amplifier creates a potential across the DAC output impedance. This voltage error is equivalent to the input bias current multiplied by the DAC output impedance value. For fast settling, the slew rate of the operational amplifier should not impede the settling time of the DAC. Output impedance of the DAC is constant and code-independent, but in order to minimize gain errors the input impedance of the output amplifier should be as high as possible. Additionally, the amplifier adds another time constant, which increases the settling time response of the system. A higher 3-dB bandwidth amplifier effectively shortens the settling time, and additionally increases the bandwidth of the system.

8.2.2.5 Unbuffered Settling Response

For applications that use the unbuffered output, the typical settling response for different capacitive loads is displayed in Figure 53.