The device output amplifiers and internal reference power-down status can be individually configured and monitored though the PWDWN registers. Setting a DAC channel in power-down mode disables the output amplifier and clamps the output pin to ground through an internal 10-kΩ resistor.

The DAC data registers are not cleared when the DAC goes into power-down mode. Therefore, upon return to normal operation, the DAC output voltages return to the same respective voltages prior to the device entering power-down mode. The DAC data registers can be updated while in power-down mode, which allows for changing the power-on voltage, if required.

After a power-on or reset event, all the DAC channels and the internal reference are in power-down mode. The entire device can be configured into power-down or active modes through the DEV-PWDWN bit.