ZHCSRX3 april 2023 DAC63202W
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics: Voltage Output
- 6.6 Electrical Characteristics: Current Output
- 6.7 Electrical Characteristics: Comparator Mode
- 6.8 Electrical Characteristics: General
- 6.9 Timing Requirements: I2C Standard Mode
- 6.10 Timing Requirements: I2C Fast Mode
- 6.11 Timing Requirements: I2C Fast Mode Plus
- 6.12 Timing Requirements: SPI Write Operation
- 6.13 Timing Requirements: SPI Read and Daisy Chain Operation (FSDO = 0)
- 6.14 Timing Requirements: SPI Read and Daisy Chain Operation (FSDO = 1)
- 6.15 Timing Requirements: GPIO
- 6.16 Timing Diagrams
- 6.17 Typical Characteristics: Voltage Output
- 6.18 Typical Characteristics: Current Output
- 6.19 Typical Characteristics: Comparator
- 6.20 Typical Characteristics: General
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
- 7.5 Programming
- 7.6
Register Map
- 7.6.1 NOP Register (address = 00h) [reset = 0000h]
- 7.6.2 DAC-X-MARGIN-HIGH Register (address = 13h, 01h) [reset = 0000h]
- 7.6.3 DAC-X-MARGIN-LOW Register (address = 14h, 02h) [reset = 0000h]
- 7.6.4 DAC-X-VOUT-CMP-CONFIG Register (address = 15h, 03h) [reset = 0000h]
- 7.6.5 DAC-X-IOUT-MISC-CONFIG Register (address = 16h, 04h) [reset = 0000h]
- 7.6.6 DAC-X-CMP-MODE-CONFIG Register (address = 17h, 05h) [reset = 0000h]
- 7.6.7 DAC-X-FUNC-CONFIG Register (address = 18h, 06h) [reset = 0000h]
- 7.6.8 DAC-X-DATA Register (address = 1Ch, 19h) [reset = 0000h]
- 7.6.9 COMMON-CONFIG Register (address = 1Fh) [reset = 0FFFh]
- 7.6.10 COMMON-TRIGGER Register (address = 20h) [reset = 0000h]
- 7.6.11 COMMON-DAC-TRIG Register (address = 21h) [reset = 0000h]
- 7.6.12 GENERAL-STATUS Register (address = 22h) [reset = 00h, DEVICE-ID, VERSION-ID]
- 7.6.13 CMP-STATUS Register (address = 23h) [reset = 0000h]
- 7.6.14 GPIO-CONFIG Register (address = 24h) [reset = 0000h]
- 7.6.15 DEVICE-MODE-CONFIG Register (address = 25h) [reset = 0000h]
- 7.6.16 INTERFACE-CONFIG Register (address = 26h) [reset = 0000h]
- 7.6.17 SRAM-CONFIG Register (address = 2Bh) [reset = 0000h]
- 7.6.18 SRAM-DATA Register (address = 2Ch) [reset = 0000h]
- 7.6.19 BRDCAST-DATA Register (address = 50h) [reset = 0000h]
- 7.6.20 PMBUS-PAGE Register [reset = 0300h]
- 7.6.21 PMBUS-OP-CMD-X Register [reset = 0000h]
- 7.6.22 PMBUS-CML Register [reset = 0000h]
- 7.6.23 PMBUS-VERSION Register [reset = 2200h]
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
8.2 Typical Application
A power-supply margining and scaling circuit is used to trim, scale, or test the output of a power converter. This example circuit is used to test a system by margining the power supplies for adaptive voltage scaling or to program a desired value at the output. Adjustable power supplies, such as low-dropout regulators (LDOs) and DC/DC converters, provide a feedback or adjust the input that is used to set the desired output. A precision voltage-output DAC is the best choice for controlling the power-supply output linearly. Figure 8-1 shows a control circuit for a switch-mode power supply (SMPS) using the DAC63202W. Typical applications of power-supply margining are communications equipment, enterprise servers, test and measurement, and general-purpose power-supply modules.
Figure 8-1 Voltage Margining and
Scaling