ZHCSJ19E november 2018 – august 2023 DAC60501 , DAC70501 , DAC80501
PRODUCTION DATA
A basic sample-and-hold circuit consists of a voltage source (DAC in this case), a switch, a capacitor, and a buffer. As the name implies, this circuit has two modes of operation: sample and hold. In sample mode, the switch is closed connecting the DAC output to the hold capacitor, CH. In hold mode, the switch opens, disconnecting the DAC output from CH. Thus, the final output is held to the sampled value because of the charge stored on hold capacitor CH. The output buffer is needed for delivering the required current. In a practical circuit, the switch leakage and the amplifier bias current make the capacitor drift from the stored value. Therefore, the sample-and-hold circuit must be refreshed, even if the DAC value does not change. The key design parameters of a sample-and-hold circuit are charge injection and voltage droop.