ZHCSH64D June 2017 – August 2018 DAC60508 , DAC70508 , DAC80508
PRODUCTION DATA.
- 1 特性
- 2 应用
- 3 说明
- 4 修订历史记录
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Map
- 8.6.1 NOP Register (address = 0x00) [reset = 0x0000]
- 8.6.2 DEVICE ID Register (address = 0x01) [reset = 0x---]
- 8.6.3 SYNC Register (address = 0x2) [reset = 0xFF00]
- 8.6.4 CONFIG Register (address = 0x3) [reset = 0x0000]
- 8.6.5 GAIN Register (address = 0x04) [reset = 0x---]
- 8.6.6 TRIGGER Register (address = 0x05) [reset = 0x0000]
- 8.6.7 BRDCAST Register (address = 0x6) [reset = 0x0000]
- 8.6.8 STATUS Register (address = 0x7) [reset = 0x0000]
- 8.6.9 DACx Register (address = 0x8 to 0xF) [reset = 0x0000 or 0x8000]
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文档支持
- 13机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
- RTE|16
订购信息
8.3.1.1 DAC Transfer Function
The input data are written to the individual DAC Data registers in straight binary format. After a power-on or a reset event, all DAC registers are set to either zero code (DACx0508Z) or midscale code (DACx0508M). The DAC transfer function is given by Equation 1.
where:
CODE = decimal equivalent of the binary code that is loaded to the DAC register. CODE ranges from 0 to 2n – 1.
VREF = DAC reference voltage. Either VREFOUT from the internal 2.5 V reference or VREFIN if using an external one.
n = resolution in bits. Either 12 (DAC60508), 14 (DAC70508) or 16 (DAC80508).
DIV = 1 or 2 as set by the REF-DIV bit in the GAIN register. Set to 1 by default.
GAIN = 1 or 2 as set by the BUFF-GAIN bit for that DAC channel in the GAIN register. Set to 1 by default in DACx0508Z and to 2 in DACx0508M.