DAC8551-Q1 是一款小型、低功耗、电压输出、16 位数模转换器 (DAC),符合汽车类 应用的需求。DAC8551-Q1 具有出色的线性度,并且最大限度减少了意外的码间瞬态电压。DAC8551-Q1 器件采用时钟速率达 30MHz 的通用三线制串口,并且兼容标准的 SPI、QSPI、Microwire 和数字信号处理器 (DSP) 接口。
DAC8551-Q1 需要使用一个外部基准电压来设置其输出范围。DAC8551-Q1 包含一个上电复位电路,可确保 DAC 输出在 0V 时上电,并在器件被执行有效写操作之前一直保持此状态。DAC8551-Q1 包含一个由串口访问的掉电特性,可将器件在 5V 电压下的电流消耗降低至 800μA。
DAC8551-Q1 在 5V 电压下的功耗仅为 800µW,在掉电模式下的功耗降至 4μW 以下。DAC8551-Q1 采用 VSSOP-8 封装。
器件型号 | 封装 | 封装尺寸(标称值) |
---|---|---|
DAC8551-Q1 | 超薄小外形尺寸封装 (VSSOP) (8) | 3.00mm × 3.00mm |
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
DIN | 7 | I | Serial data input. Data is clocked into the 24-bit input shift register on each falling edge of the serial clock input. Schmitt-trigger logic input. |
GND | 8 | GND | Ground reference point for all circuitry on the device |
SCLK | 6 | I | Serial clock input. Data can be transferred at rates up to 3 0MHz. Schmitt-trigger logic input. |
SYNC | 5 | I | Level-triggered control input (active-low). This is the frame synchronization signal for the input data. SYNC going low enables the input shift register, and data is transferred in on the falling edges of the following clocks. The DAC is updated following the 24th clock (unless SYNC is taken high before this edge, in which case the rising edge of SYNC acts as an interrupt, and the write sequence is ignored by the DAC8551-Q1). Schmitt-trigger logic input. |
VDD | 1 | PWR | Power supply input, 3.2 V to 5.5 V. |
VFB | 3 | I | Feedback connection for the output amplifier. For voltage output operation, tie to VOUT externally. |
VOUT | 4 | O | Analog output voltage from DAC. The output amplifier has rail-to-rail operation. |
VREF | 2 | I | Reference voltage input. |