米6体育平台手机版

ZHCSC70D December 2013 – December 2021 DAC7750 , DAC8750

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

PWP|24
- MPDS372A
RHA|40
- MPQF135D

散热焊盘机械数据 (封装 | 引脚)

PWP|24
- PPTD264C
RHA|40
- QFND114P

订购信息

7.10 Typical Characteristics

at T_A = 25°C (unless otherwise noted)

30 units shown	AVDD = 24 V

Figure 7-3 REFOUT vs Temperature

AVDD = 24 V

Figure 7-5 REFOUT vs Load Current

AVDD = 24 V

Figure 7-7 REFOUT Noise PSD vs Frequency

AVDD = 10 V

Figure 7-9 REFOUT Transient vs Time

T_A = 25°C	External DVDD

Figure 7-11 DIDD vs External DVDD

AVDD = 18 V	C_LOAD = 100 nF

Figure 7-13 Internal DVDD PSRR vs Frequency

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-15 IOUT TUE vs Code (0 mA to 20 mA)

AVDD = 10 V	R_LOAD = 300 Ω

Figure 7-17 IOUT TUE vs Temperature (Internal R_SET)

R_LOAD = 300 Ω	0-mA to 24-mA range

Figure 7-19 IOUT TUE vs Supply (Internal R_SET)

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-21 IOUT INL vs Code (0 mA to 24 mA)

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-23 IOUT INL vs Code (4 mA to 20 mA)

AVDD = 10 V	R_LOAD = 300 Ω	All IOUT ranges

Figure 7-25 IOUT INL vs Temperature (External R_SET)

R_LOAD = 300 Ω	0-mA to 24-mA range

Figure 7-27 IOUT INL vs Supply (External R_SET)

AVDD = 24 V	0-mA to 24-mA range
R_LOAD = 300 Ω

Figure 7-29 IOUT DNL vs Code (0 mA to 20 mA)

AVDD = 10 V	R_LOAD = 300 Ω	All IOUT ranges

Figure 7-31 IOUT DNL vs Temperature (Internal R_SET)

R_LOAD = 300 Ω	0-mA to 24-mA range

Figure 7-33 IOUT DNL vs Supply (Internal R_SET)

AVDD = 10 V	R_LOAD = 300 Ω

Figure 7-35 IOUT Full-Scale Error vs Temperature

AVDD = 10 V	R_LOAD = 300 Ω

Figure 7-37 IOUT Gain Error vs Temperature

Figure 7-39 R3 Resistance Temperature Drift Histogram

AVDD = 36 V		R_LOAD = 300 Ω
DAC configured to deliver 24 mA
NOTE: Compliance voltage headroom is defined as the drop from the AVDD pin to the IOUT pin.

Figure 7-41 IOUT vs Compliance Headroom Voltage

AVDD = 24 V	4-mA to 20-mA range
R_LOAD = 300 Ω	From code: 0x0000	To code: 0xFFFF

Figure 7-43 4-mA to 20-mA Falling

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-45 IOUT Output Enable Glitch

AVDD = 24 V	R_LOAD = 300 Ω	All IOUT ranges

Figure 7-47 IOUT Noise PSD vs Frequency

AVDD = 36 V	Output disabled

Figure 7-49 IOUT Hi-Z Leakage Current vs Voltage

Figure 7-4 Internal Reference Temperature Drift Histogram

T_A = 25°C

Figure 7-6 REFOUT vs AVDD

AVDD = 24 V

Figure 7-8 Internal Reference, Peak-to-Peak Noise (0.1 Hz to 10 Hz)

External DVDD	IOUT = 0 mA

Figure 7-10 AIDD vs AVDD

T_A = 25°C	Internal DVDD

Figure 7-12 Internal DVDD vs Load Current

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-14 IOUT TUE vs Code (0 mA to 24 mA)

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-16 IOUT TUE vs Code (4 mA to 20 mA)

AVDD = 10 V	R_LOAD = 300 Ω

Figure 7-18 IOUT TUE vs Temperature (External R_SET)

R_LOAD = 300 Ω	0-mA to 24-mA range

Figure 7-20 IOUT TUE vs Supply (External R_SET)

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-22 IOUT INL vs Code (0 mA to 20 mA)

AVDD = 10 V	R_LOAD = 300 Ω	All IOUT ranges

Figure 7-24 IOUT INL vs Temperature (Internal R_SET)

R_LOAD = 300 Ω	0-mA to 24-mA range

Figure 7-26 IOUT INL vs Supply (Internal R_SET)

AVDD = 24 V	0-mA to 24-mA range
R_LOAD = 300 Ω

Figure 7-28 IOUT DNL vs Code (0 mA to 24 mA)

AVDD = 24 V	4-mA to 24-mA range
R_LOAD = 300 Ω

Figure 7-30 IOUT DNL vs Code (4 mA to 20 mA)

AVDD = 10 V	R_LOAD = 300 Ω	All IOUT ranges

Figure 7-32 IOUT DNL vs Temperature (External R_SET)

R_LOAD = 300 Ω	0-mA to 24-mA range

Figure 7-34 IOUT DNL vs Supply (External R_SET)

AVDD = 10 V	R_LOAD = 300 Ω

Figure 7-36 IOUT Offset Error vs Temperature

33 units shown

Figure 7-38 R3 Resistance vs Temperature

AVDD = 36 V	IOUT = 24 mA	R_LOAD = 300 Ω
NOTE: Compliance voltage headroom is defined as the drop from the AVDD pin to the IOUT pin.

Figure 7-40 Compliance Headroom Voltage vs Temperature

AVDD = 24 V	4-mA to 20-mA range
R_LOAD = 300 Ω	From code: 0x0000	To code: 0xFFFF

Figure 7-42 4-mA to 20-mA Rising

AVDD = 24 V	R_LOAD = 300 Ω

Figure 7-44 IOUT Power-On Glitch

AVDD = 24 V	R_LOAD = 250 Ω

Figure 7-46 IOUT Digital-to-Analog Glitch

AVDD = 24 V	0-mA to 20-mA range
DAC = midscale

Figure 7-48 IOUT Peak-to-Peak Noise vs Time (0.1 Hz to 10 Hz)

AVDD = 24 V	R_LOAD = 250 Ω	All IOUT ranges

Figure 7-50 IOUT PSRR vs Frequency