SLAS411D November   2004  – February 2016 DAC8811

PRODUCTION DATA.  

  1. 1  Features
  2. 2  Applications
  3. 3  Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6  Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics: VDD = 5 V
    8. 7.8 Typical Characteristics: VDD = 2.7 V
  8. 8  Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Stability Circuit
      2. 8.3.2 Positive Voltage Output Circuit
      3. 8.3.3 Bipolar Output Circuit
      4. 8.3.4 Programmable Current Source Circuit
    4. 8.4 Device Functional Mode
    5. 8.5 Programming
      1. 8.5.1 DAC8811 Input Shift Register
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage VDD to GND –0.3 7 V
V (IOUT) to GND –0.3 VDD + 0.3 V
Digital input voltage GND –0.3 VDD + 0.3 V
Reference voltage, VREF RFB to GND –25 25 V
Operating temperature –40 105 °C
Junction temperature, TJ 125 °C
Storage temperature, Tstg –65 150
(1) Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

7.2 ESD Ratings

MAX UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage to GND 2.7 5.5 V
Operating ambient temperature, TA –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) DAC8811 UNIT
DGK (VSSOP) DRB (VSON)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 169.6 46.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 64.2 61.3 °C/W
RθJB Junction-to-board thermal resistance 90.3 22 °C/W
ψJT Junction-to-top characterization parameter 7.7 1.1 °C/W
ψJB Junction-to-board characterization parameter 88.8 22.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 3.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

VDD = 2.7 V to 5.5 V; IOUT = Virtual GND, GND = 0 V; VREF = 10 V; TA = full operating temperature. All specifications -40°C to 85°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC PERFORMANCE
Resolution 16 Bits
Relative accuracy DAC8811C ±1 LSB
Relative accuracy DAC8811B ±2 LSB
Differential nonlinearity ±0.5 ±1 LSB
Output leakage current Data = 0000h, TA = 25°C 10 nA
Output leakage current Data = 0000h, TA = TMAX 10 nA
Full-scale gain error All ones loaded to DAC register ±1 ±4 mV
Full-scale tempco ±3 ppm/°C
OUTPUT CHARACTERISTICS(1)
Output current 2 mA
Output capacitance Code dependent 50 pF
REFERENCE INPUT(1)
VREF Range –15 15 V
Input resistance 5 kΩ
Input capacitance 5 pF
LOGIC INPUTS AND OUTPUT(1)
VIL Input low voltage VDD = 2.7V 0.6 V
VDD = 5V 0.8 V
VIH Input high voltage VDD = 2.7V 2.1 V
VDD = 5V 2.4 V
IIL Input leakage current 10 µA
CIL Input capacitance 10 pF
POWER REQUIREMENTS
VDD 2.7 5.5 V
IDD (normal operation) Logic inputs = 0 V 5 µA
VDD = 4.5 V to 5.5 V VIH = VDD and VIL = GND 3 5 µA
VDD = 2.7 V to 3.6 V VIH = VDD and VIL = GND 1 2.5 µA
AC CHARACTERISTICS(1) (2)
BW –3 dB Reference mutiplying BW VREF = 5 VPP, Data = FFFFh 10 MHz
DAC glitch impulse VREF = 0 V to 10 V, Data = 7FFFh to 8000h to 7FFFh 2 nV/s
Feed through error VOUT/VREF Data = 0000h, VREF = 100 mVRMS, f = 100kHz –70 dB
Digital feed through CS = 1 and fCLK = 1 MHz 2 nV/s
Total harmonic distortion VREF = 5 VPP, Data = FFFFh, f = 1 kHz –105 dB
Output spot noise voltage f = 1 kHz, BW = 1 Hz 12 nV/√Hz
(1) Specified by design and characterization; not production tested.
(2) All ac characteristic tests are performed in a closed-loop system using the THS4011 I-to-V converter amplifier.

7.6 Timing Requirements

MIN NOM MAX UNIT
INTERFACE TIMING
fCLK Clock input frequency 50 MHz
t(CH) Clock pulse width high 10 ns
t(CL) Clock pulse width low 10 ns
t(CSS) CS to Clock setup time 0 ns
t(CSH) Clock to CS hold time 10 ns
t(DS) Data setup time 5 ns
t(DH) Data hold time 10 ns
AC CHARACTERISTICS(1) (2)
ts Output voltage settling time To ±0.1% of full-scale, Data = 0000h to FFFFh to 0000h 0.3 µs
To ±0.0015% of full-scale, Data = 0000h to FFFFh to 0000h 0.5 µs
DAC8811 Timing_Diagram_SLAS411.gif Figure 1. DAC8811 Timing Diagram

7.7 Typical Characteristics: VDD = 5 V

At TA = 25°C, +VDD = 5 V, unless otherwise noted.
DAC8811 tc_5v_inl25_las411.gif
TA = 25°C
Figure 2. Linearity Error vs Digital Input Code
DAC8811 tc_5v_inl40_las411.gif
TA = –40°C
Figure 4. Linearity Error vs Digital Input Code
DAC8811 tc_5v_inl85_las411.gif
TA = 85°C
Figure 6. Linearity Error vs Digital Input Code
DAC8811 tc_iqvlogic_las411.gif
Figure 8. Supply Current vs Logic Input Voltage
DAC8811 tc_glitch_las411.gif
Figure 10. DAC Glitch
DAC8811 tc_5v_dnl25_las411.gif
TA = 25°C
Figure 3. Differential Linearity Error vs Digital Input Code
DAC8811 tc_5v_dnl40_las411.gif
TA = –40°C
Figure 5. Differential Linearity Error vs Digital Input Code
DAC8811 tc_5v_dnl85_las411.gif
TA = 85°C
Figure 7. Differential Linearity Error vs Digital Input Code
DAC8811 ref_bw_las411.gif
Figure 9. Reference Multiplying Bandwidth
DAC8811 tc_vo-settle_las411.gif
Figure 11. DAC Settling Time

7.8 Typical Characteristics: VDD = 2.7 V

At TA = 25°C, +VDD = 2.7 V, unless otherwise noted.
DAC8811 tc_27v_inl25_las411.gif
TA = 25°C
Figure 12. Linearity Error vs Digital Input Code
DAC8811 tc_27v_inl40_las411.gif
TA = –40°C
Figure 14. Linearity Error vs Digital Input Code
DAC8811 tc_27v_inl85_las411.gif
TA = 85°C
Figure 16. Linearity Error vs Digital Input Code
DAC8811 tc_27v_dnl25_las411.gif
TA = 25°C
Figure 13. Differential Linearity Error vs Digital Input Code
DAC8811 tc_27v_dnl40_las411.gif
TA = –40°C
Figure 15. Differential Linearity Error vs Digital Input Code
DAC8811 tc_27v_dnl85_las411.gif
TA = 85°C
Figure 17. Differential Linearity Error vs Digital Input Code
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP | 米乐app下载官网（中国）|ios|Android/通用版APP最新版 | 米乐|米乐·M6（中国大陆）官方网站 | 千亿体育登陆地址 | 华体会体育（中国）HTH·官方网站 | 千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载 | 18新利网v1.2.5|中国官方网站 | bob电竞真人（中国官网）安卓/ios苹果/电脑版【1.97.95版下载】 | 千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装 |