ZHCSHA4B July 2007 – January 2018 DAC8881
PRODUCTION DATA.
The DAC8881 has a double-buffered interface consisting of two register banks: the input register and the DAC latch. The input register is connected directly to the input shift register and the digital code is transferred to the input register upon completion of a valid write sequence. The DAC latch contains the digital code used by the resistor R-2R ladder. The contents of the DAC latch defines the output from the DAC.
Access to the DAC register is controlled by the LDAC pin. When LDAC is high, the DAC register is latched and the input register can change state without affecting the contents of the DAC latch. When LDAC is low, however, the DAC latch becomes transparent and the contents of the input register is transferred to the DAC register.