ZHCSHA4B July 2007 – January 2018 DAC8881
PRODUCTION DATA.
All digital input and output pins are compatible with any logic supply voltage between 1.8 V and 5.5 V. Connect the interface logic supply voltage to the IOVDD pin. Although timing is specified down to 2.7 V (see the Timing Characteristics), IOVDD can operate as low as 1.8 V, but with degraded timing and temperature performance. For the lowest power consumption, logic VIH levels should be as close as possible to IOVDD, and logic VIL levels should be as close as possible to GND. Note that the DAC8881 core internal digital logic operates from the same voltage as the 2.7V to 5.5V AVDD supply, so the DVDD pin must also be connected to the AVDD supply voltage.