Each of the DCR01 series devices can be disabled or enabled by driving the SYNC pin using an open-drain CMOS gate. If the SYNC pin is pulled low, the DCR01 becomes disabled. The disable time depends upon the external loading. The internal disable function is implemented in 2 μs. Removal of the pulldown causes the DCR01 to be enabled.

Capacitive loading on the SYNC pin must be minimized (≤ 3 pF) to prevent a reduction in the oscillator frequency. The External Synchronization of the DCP01/02 Series of DC/DC Converters application report describes disable and enable control circuitry. This document contains information on how to null the effects of additional capacitance on the SYNC pin. The frequency of the oscillator can be measured at V_REC, since this is the fundamental frequency of the ripple component.