ZHCSFA7A July   2016  – April 2017 DIX4192-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 说明 （续）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 RESET Operation
      2. 9.3.2 Master and Reference Clocks
      3. 9.3.3 Audio Serial Port Operation
      4. 9.3.4 Overview of the AES3 Digital Audio Interface Protocol
      5. 9.3.5 Digital Interface Transmitter (DIT) Operation
      6. 9.3.6 Digital Interface Receiver (DIR) Operation
      7. 9.3.7 General-Purpose Digital Outputs
      8. 9.3.8 Interrupt Output
    4. 9.4 Device Functional Modes
      1. 9.4.1 Host Interface Operation: Serial Peripheral Interface (SPI) Mode
      2. 9.4.2 Host Interface Operation: PHILIPS I2C Mode
    5. 9.5 Register Maps
      1. 9.5.1 Register and Data Buffer Organization
      2. 9.5.2 Control Registers
        1. 9.5.2.1 Registers 1F through 28: Q-Channel Sub-Code Data Registers
        2. 9.5.2.2 Registers 29 through 2C: IEC61937 PC/PD Burst Preamble
      3. 9.5.3 Channel Status and User Data Buffer Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Digital Audio Transformer Vendors
      2. 10.1.2 Receiver Input Interfacing
      3. 10.1.3 Transmitter Output Interfacing
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Differential Line Inputs and Output
        2. 10.2.2.2 Serial Ports
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 开发支持
    2. 13.2 文档支持
      1. 13.2.1 相关文档
    3. 13.3 接收文档更新通知
    4. 13.4 社区资源
    5. 13.5 商标
    6. 13.6 静电放电警告
    7. 13.7 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

11 Power Supply Recommendations

The DIX4192-Q1 requires a 1.8-V and 3.3-V nominal supply rails. At least one 3.3-V supply is required for VCC, VDD33. VIO can operate at 1.8 V or at 3.3 V. VDD18 requires a 1.8-V nominal supply rail. The decoupling capacitors for the power supplies must be placed close to the device terminals.

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