The DMD connects to a PCB or a flex circuit using
an interposer. For additional layout guidelines
regarding length matching, and impedance, see the
DLPC3434 controller
data sheet. For a detailed layout example refer to
the layout design files. Some layout guidelines
for routing to the DMD are:
- Match lengths for the LS_WDATA
nd LS_CLK signals.
- Minimize vias, layer changes, and turns for the
HS bus signals. Refer to Figure 10-1.
- Minimum of two 100-nF (25 V) capacitors - one
close to VBIAS pin. Capacitors C4 and
C8 in Figure 10-1.
- Minimum of two 100-nF (25 V) capacitors - one
close to each VRST pin. Capacitors C3
and C7 in Figure 10-1.
- Minimum of two 220-nF (25 V) capacitors - one
close to each VOFS pin. Capacitors C5
and C6 in Figure 10-1.
- Minimum of four 100-nF (6.3 V) capacitors - two
close to each side of the DMD. Capacitors C1, C2,
C9 and C10 in Figure 10-1.