7.3.3 Micromirror Switching Control

Once data is loaded onto the DMD, the mirrors are caused to switch position (+12° or –12°) based on the timing signal sent to the DMD Mirror and SRAM control logic. The DMD mirrors will be switched from OFF to ON or ON to OFF, or stay in the same position based on control signals DAD_BUS, RESET_STROBE, SAC_BUS, and SAC_CLK, which are coordinated with the data loading by the DLPC120-Q1. In general, the DLPC120-Q1 loads the DMD SRAM memory cells over the DDR interface, and then commands to the micromirrors to switch position.

At power down, the DMD Mirrors are commanded by the DLPC120-Q1 to move to a near flat (0°) position as shown in Power Supply Recommendations section. The flat state position of the DMD mirrors are referred to as the “Parked” state. To maintain long term DMD reliability, the DMD must be properly “Parked” prior to every power down of the DMD power supplies. Refer to the DLPC120-Q1 Programmer's Guide for information about properly parking the DMD.