The DLPC350 controller contains two PLLs (PLLM and PLLD), each of which have dedicated 1.2-V digital and 1.8-V analog supplies. These 1.2-V PLL pins must be individually isolated from the main 1.2-V system supply via a ferrite bead. The impedance of the ferrite bead must be much greater than the capacitor at frequencies where noise is expected. The impedance of the ferrite bead must also be less than 0.5 Ω in the frequency range of 100 to 300 kHz and greater than 10 Ω at frequencies greater than 100 MHz.

Isolate the 1.8-V analog PLL power and ground pins as a minimum, using an LC filter with a ferrite bead serving as the inductor and a 0.1-µF capacitor on the DLPC350 side of the ferrite bead. TI recommends that this 1.8-V PLL power be supplied from a dedicated linear regulator and each PLL should be individually isolated from the regulator. The same ferrite recommendations described for the 1.8-V analog PLL supply apply to the 1.2-V digital PLL supply.

When designing the overall supply filter network, care must be taken to ensure that no resonances occur. Take special care when using the 1- to 2-MHz band because this coincides with the PLL natural loop frequency.