ZHCSRC7C December 2022 – August 2024 DLP4620S-Q1
PRODUCTION DATA
The purpose of the low speed interface is to configure the DMD at power up and power down and to control the micromirror reset voltage levels that are synchronized with the data loading. The micromirror reset voltage controls the time when the mirrors are mechanically switched. The low speed differential interface includes two pairs of signals for write data and clock, and two single-ended signals for output (A and B).