ZHCSRC7C December 2022 – August 2024 DLP4620S-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 应用
- 3 说明
- 4 Pin Configuration and Functions
-
5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 Storage Conditions
- 5.3 ESD Ratings
- 5.4 Recommended Operating Conditions
- 5.5 Thermal Information
- 5.6 Electrical Characteristics
- 5.7 Timing Requirements
- 5.8 Switching Characteristics
- 5.9 System Mounting Interface Loads
- 5.10 Micromirror Array Physical Characteristics
- 5.11 Micromirror Array Optical Characteristics
- 5.12 Window Characteristics
- 5.13 Chipset Component Usage Specification
- 6 Detailed Description
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
7.3.3 Power Supply Sequencing Requirements
- To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than the Recommended Operating Conditions specified. OEMs may find that the most reliable way to ensure this is to power VOFFSET prior to VBIAS during power-up and to remove VBIAS prior to VOFFSET during power-down. Also, the TPS99000S-Q1 is capable of managing the timing between VBIAS and VOFFSET.
- To prevent excess current, the supply voltage delta |VBIAS – VRESET| must be less than specified than the Recommended Operating Conditions limit shown.
- When system power is interrupted, the TPS99000S-Q1 initiates hardware power-down that disables VBIAS, VRESET, and VOFFSET after the Micromirror Park Sequence.
- LS_CLK and LS_WDATA signals are ignored until DMD_DEN_ARSTZ is released.
- The drawing is not to scale and details are omitted for clarity. For example, the DLPC231S-Q1 will read information from DLP4620S-Q1 during initialization and activity on LS_CLK, LSWDATA, and DMD_DEN_ARSTZ may toggle multiple times prior to displaying information on DLP4620S-Q1.