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ZHCSKH6C April 2019 – February 2023 DLP470NE

PRODUCTION DATA

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机械数据 (封装 | 引脚)

FXH|257
- MCSS006B

散热焊盘机械数据 (封装 | 引脚)

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6.8 Timing Requirements

			MIN	NOM	MAX	UNIT
SCP⁽¹⁾
t_r	Rise time	20% to 80% reference points			30	ns
t_f	Fall time	80% to 20% reference points			30	ns
LVDS⁽²⁾
t_r	Rise slew rate	20% to 80% reference points	0.7	1		V/ns
t_f	Fall slew rate	80% to 20% reference points	0.7	1		V/ns
t_C	Clock cycle	DCLK_C,LVDS pair	2.5			ns
t_C	Clock cycle	DCLK_D, LVDS pair	2.5			ns
t_W	Pulse duration	DCLK_C LVDS pair	1.19	1.25		ns
t_W	Pulse duration	DCLK_D LVDS pair	1.19	1.25		ns
t_Su	Setup time	D_C(15:0) before DCLK_C, LVDS pair	0.275			ns
		D_D(15:0) before DCLK_D, LVDS pair	0.275			ns
		SCTRL_C before DCLK_C, LVDS pair	0.275			ns
		SCTRL_D before DCLK_D, LVDS pair	0.275			ns
t_h	Hold time	D_C(15:0) after DCLK_C, LVDS pair	0.195			ns
		D_D(15:0) after DCLK_D, LVDS pair	0.195			ns
		SCTRL_C after DCLK_C, LVDS pair	0.195			ns
		SCTRL_D after DCLK_D, LVDS pair	0.195			ns
t_SKEW	Skew time	Channel D relative to Channel C⁽³⁾⁽⁴⁾, LVDS pair	–1.25		1.25	ns

(1) See Figure 6-3 for Rise Time and Fall Time for SCP.

(2) See Figure 6-5 for Timing Requirements for LVDS.

(3) Channel C (Bus C) includes the following LVDS pairs: DCLK_CN and DCLK_CP, SCTRL_CN and SCTRL_CP, D_CN(15:0) and D_CP(15:0).

(4) Channel D (Bus D) includes the following LVDS pairs: DCLK_DN and DCLK_DP, SCTRL_DN and SCTRL_DP, D_DN(15:0) and D_DP(15:0).

Figure 6-2 SCP Timing Requirements

See Recommended Operating Conditions for f_SCPCLK, t_{SCP_DS}, t_{SCP_DH}, and t_{SCP_PD} specifications.

Figure 6-3 SCP Requirements for Rise and Fall

See Timing Requirements for t_r and t_f specifications and conditions.

Figure 6-4 Test Load Circuit for Output Propagation Measurement

For output timing analysis, the tester pin electronics and its transmission line effects must be taken into account. System designers use IBIS or other simulation tools to correlate the timing reference load to a system environment. See Figure 6-4.

Figure 6-5 LVDS Waveform Requirements

See Recommended Operating Conditions for V_CM, V_ID, and V_LVDS specifications and conditions.

Figure 6-6 Timing Requirements

See Timing Requirements for timing requirements and LVDS pairs per channel (bus) defining D_P(?:0) and D_N(?:0).