B. To prevent excess current, the
supply voltage difference |V
BIAS – V
OFFSET| must be less
than the specified limit in
Section 6.4.
C. To prevent excess current, the
supply difference |V
BIAS – V
RESET| must be less than the
specified limit in the
Section 6.4.
D. V
BIAS must power up
after V
OFFSET has powered up, per the Delay1 specification in
Table 9-1.
H. V
DD must remain high
until after V
OFFSET, V
BIAS, V
RESET go low, per
Delay2 specification in
Table 9-1.
I. To prevent excess current, the
supply voltage delta |V
DDA – V
DD| must be less than
specified limit in
Section 6.4.