ZHCSO64B September 2020 – April 2022 DLP471TE
PRODUCTION DATA
The following power supplies are all required to operate the DMD:
DMD power-up and power-down sequencing is strictly controlled by the DLP display controller.
For reliable operation of the DMD, the following power supply sequencing requirements must be followed. Failure to adhere to any of the prescribed power-up and power-down requirements may affect device reliability. See the DMD power supply sequencing requirements in Figure 9-1.
VBIAS, VDD, VOFFSET, and VRESET power supplies must be coordinated during power-up and power-down operations. Failure to meet any of the below requirements will result in a significant reduction in the DMD reliability and lifetime. Common ground VSS must also be connected.
| SYMBOL | PARAMETER | DESCRIPTION | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| tDELAY1 | Delay requirement | from VOFFSET power up to VBIAS power up | 1 | 2 | ms | |
| tDELAY2 | Delay requirement | from VBIAS and VRESET powered on and stable to DMD_EN_ARSTZ going high | 20 | µs | ||
| tDELAY3 | Delay requirement | from VOFFSET, VBIAS, and VRESET power down to when VDD and VDDA can power down | 50 | µs |