米6体育平台手机版

ZHCSO64B September 2020 – April 2022 DLP471TE

PRODUCTION DATA

6.7 Switching Characteristics

Over operating free-air temperature range and supply voltages (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	MAX	UNIT
t_pd	Output propagation, Clock to Q (C2Q), rising edge of LS_CLK (differential clock signal) input to LS_RDATA output.⁽¹⁾	C_L = 5 pF		11.1	ns
t_pd		C_L = 10 pF		11.3	ns
	Slew rate, LS_RDATA	20%–80%, C_L<10 pF	0.5		V/ns
	Output duty cycle distortion, LS_RDATA_A and LS_RDATA_B	50–(C2Q rise – C2Q fall ) × 130e6 × 100	40%	60%

Figure 6-2 Switching Characteristics