ZHCSKV7A November 2020 – July 2022 DLP500YX
PRODUCTION DATA
TI recommends that the board has matched impedance of 50 Ω ±10% for all signals. The exceptions are listed in Figure 10-1 and repeated for convenience in Table 10-3.
Signal Type | Signal Name | Impedance (ohms) |
---|---|---|
A channel LVDS differential pairs | D_AP(0:15), D_AN(0:15) | 100 ±10% differential across each pair |
DCLK_AP, DCLK_AN | ||
SCTRL_AP, SCTRL_AN | ||
B channel LVDS differential pairs | D_BP(0:15), D_BN(0:15) | 100 ±10% differential across each pair |
DCLK_BP, DCLK_BN | ||
SCTRL_BP, SCTRL_BN | ||
C channel LVDS differential pairs | D_CP(0:15), D_CN(0:15) | 100 ±10% differential across each pair |
DCLK_CP, DCLK_CN | ||
SCTRL_CP, SCTRL_CN | ||
D channel LVDS differential pairs | D_DP(0:15), D_DN(0:15) | 100 ±10% differential across each pair |
DCLK_DP, DCLK_DN | ||
SCTRL_DP, SCTRL_DN |