米6体育平台手机版

ZHCSPA1 February 2022 DLP5531A-Q1

PRODUCTION DATA

6.6 Electrical Characteristics

Over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
CURRENT
I_DD	Supply current: VDD⁽²⁾	VDD = 1.95 V			310	mA
I_DDI	Supply current: VDDI⁽²⁾	VDDI = 1.95 V			55	mA
I_OFFSET	Supply current: VOFFSET	VOFFSET = 8.75 V			6	mA
I_BIAS	Supply current: VBIAS	VBIAS = 16.5 V			1	mA
I_RESET	Supply current: VRESET	VRESET = -10.5 V			-4.5	mA
POWER
P_DD	Supply power dissipation: VDD⁽²⁾	VDD = 1.95 V			604.5	mW
P_DDI	Supply power dissipation: VDDI⁽²⁾	VDDI = 1.95 V			107.25	mW
P_OFFSET	Supply power dissipation: VOFFSET	VOFFSET = 8.75 V			52.5	mW
P_BIAS	Supply power dissipation: VBIAS	VBIAS = 16.5 V			16.5	mW
P_RESET	Supply power dissipation: VRESET	VRESET = -10.5 V			47.25	mW
P_TOTAL	Supply power dissipation: Total				828	mW
LPSDR INPUT ⁽³⁾
V_IH(DC)	DC input high voltage		0.7 × VDD		VDD + 0.3	V
V_IL(DC)	DC input low voltage		–0.3		0.3 × VDD	V
V_IH(AC)	AC input high voltage		0.8 × VDD		VDD + 0.3	V
V_IL(AC)	AC input low voltage		–0.3		0.2 × VDD	V
∆V_T	Hysteresis (V_T+ – V_T–)	See Figure 6-9	0.1 × VDD		0.4 × VDD	V
I_IL	Low–level input current	VDD = 1.95 V; V_I = 0 V	–100			nA
I_IH	High–level input current	VDD = 1.95 V; V_I = 1.95 V			300	nA
LPSDR OUTPUT ⁽⁴⁾
V_OH	DC output high voltage	I_OH = -2mA	0.8 × VDD			V
V_OL	DC output low voltage	I_OL = 2mA			0.2 × VDD	V
CAPACITANCE
C_IN	Input capacitance LPSDR	ƒ = 1 MHz			10	pF
C_IN	Input capacitance SubLVDS	ƒ = 1 MHz			20	pF
C_OUT	Output capacitance	ƒ = 1 MHz			10	pF
C_RESET	Reset group capacitance	ƒ = 1 MHz (1152 X 144 micromirrors)	350	400	450	pF
C_TEMP	Temperature sense diode capacitance	ƒ = 1 MHz			20	pF

(1) Device electrical characteristics are over Recommended Operating Conditions unless otherwise noted.

(2) Supply power dissipation based on non–compressed commands and data.

(3) LPSDR input specifications are for pin DMD_DEN_ARSTZ.

(4) LPSDR output specification is for pins LS_RDATA_A and LS_RDATA_B.