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ZHCSK93 September 2019 DLP5534-Q1

ADVANCE INFORMATION for pre-production products; subject to change without notice.

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FYK|149
- MCPS005A

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6.4 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

			MIN	NOM	MAX	UNIT
SUPPLY VOLTAGE RANGE⁽³⁾
VDD	Supply voltage for LVCMOS core logic Supply voltage for LPSDR low-speed interface		1.7	1.8	1.95	V
VDDI	Supply voltage for SubLVDS receivers		1.7	1.8	1.95	V
VOFFSET	Supply voltage for HVCMOS and micromirror electrode⁽⁴⁾		8.25	8.5	8.75	V
VBIAS	Supply voltage for mirror electrode		15.5	16	16.5	V
VRESET	Supply voltage for micromirror electrode		–9.5	–10	–10.5	V
\| VDDI–VDD \|	Supply voltage delta (absolute value)⁽⁵⁾				0.3	V
\| VBIAS–VOFFSET \|	Supply voltage delta (absolute value)⁽⁶⁾				8.75	V
CLOCK FREQUENCY
ƒ_clock	Clock frequency for low speed interface LS_CLK				120	MHz
ƒ_clock	Clock frequency for high speed interface DCLK⁽⁷⁾				600	MHz
	Duty cycle distortion DCLK		44%		56%
SUBLVDS INTERFACE⁽⁷⁾
\| V_ID \|	SubLVDS input differential voltage (absolute value, see Figure 6, Figure 7)		150	250	350	mV
V_CM	Common mode voltage (see Figure 6, Figure 7)		700	900	1100	mV
V_SUBLVDS	SubLVDS voltage (see Figure 6, Figure 7)		575		1225	mV
Z_LINE	Line differential impedance (PWB/trace)		90	100	110	Ω
Z_IN	Internal differential termination resistance (see Figure 8)		80	100	120	Ω
TEMPERATURE DIODE
I_{TEMP_DIODE}	Max current source into Temperature Diode⁽⁸⁾				120	µA
ENVIRONMENTAL
T_ARRAY	Operating DMD array temperature⁽⁹⁾		–40		105	°C
ILL_sub-385nm	Illumination, wavelength < 385 nm				2	mW/cm²
ILL_385-to-395nm	Illumination, 385 nm < wavelength < 395 nm				250	mW/cm²
ILL_395-to-400nm	Illumination, 395 nm < wavelength < 400 nm				800	mW/cm²
ILL_400-to-420nm	Illumination, 400 nm < wavelength < 420 nm				8	W/cm²
ILL_VIS	Illumination, 420 nm < wavelength < 800 nm		Thermally limited⁽¹⁰⁾			W/cm²
ILL_OVERFILL	Illumination overfill maximum heat load in areas shown in Figure 1⁽¹¹⁾	T_ARRAY ≤ 75°C			40	mW/mm²
ILL_OVERFILL	Illumination overfill maximum heat load in areas shown in Figure 1⁽¹¹⁾	T_ARRAY > 75°C			29	mW/mm²

(1) The following power supplies are all required to operate the DMD: VDD, VDDI, VOFFSET, VBIAS, and VRESET. All VSS connections are also required.

(2) Recommended Operating Conditions are applicable after the DMD is installed in the final product.

(3) All voltage values are with respect to the ground pins (VSS).

(4) VOFFSET supply transients must fall within specified max voltages.

(5) To prevent excess current, the supply voltage delta |VDDI – VDD| must be less than the specified limit.

(6) To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than the specified limit.

(7) Refer to the SubLVDS timing requirements in Timing Requirements.

(8) Temperature Diode is to allow accurate measurement of the DMD array temperature during operation.

(9) DMD active array temperature can be calculated as shown in Micromirror Array Temperature Calculation section. Additionally, the DMD array temperature is monitored in the system using the TMP411-Q1 and DLPC230-Q1 as shown in the system block diagram.

(10) Limited by the resulting micromirror array temperature. Refer to the calculation example in Micromirror Array Temperature Calculation section.

(11) The active area of the DLP5534-Q1 device is surrounded by an aperture on the inside of the DMD window surface that masks structures of the DMD device assembly from normal view. The aperture is sized to anticipate several optical conditions. Overfill light illuminating the area outside the active array can scatter and create adverse effects to the performance of an end application using the DMD. The illumination optical system should be designed to minimize light flux incident outside the active array. Depending on the particular system's optical architecture and assembly tolerances, the amount of overfill light on the outside of the active array may cause system performance degradation.

Figure 1. Illumination Overfill Diagram