米6体育平台手机版

ZHCSJ27 November 2018 DLP650LNIR

PRODUCTION DATA.

Over operating free-air temperature range (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_OH	High level output voltage	V_CC = 3 V, I_OH = – 20 mA	2.4			V
V_OL	Low level output voltage	V_CC= 3.6 V, I_OL= 15 mA			0.4	V
I_OZ	High impedance output current	V_CC = 3.6 V			10	µA
I_IL	Low level input current	V_CC = 3.6 V, VI = 0			–60	µA
I_IH	High level input current ⁽¹⁾	V_CC= 3.6 V, VI = V_CC			200	µA
I_CC	Supply current VCC ⁽²⁾	V_CC = 3.6 V			650	mA
I_CCI	Supply current VCCI ⁽²⁾	V_CCI = 3.6 V			350	mA
I_CC2	Supply current VCC2	V_CC2 = 8.75 V			25	mA
Z_IN	Internal differential termination resistance		95		105	Ω
Z_LINE	Line differential impedance (PWB/trace)		90	100	110	Ω
C_I	Input capacitance⁽¹⁾	f = 1 MHz			10	pF
C_O	Output capacitance⁽¹⁾	f = 1 MHz			10	pF
C_IM	Input capacitance for MBRST[0:15] pins	f = 1 MHz	160		210	pF

(1) Applies to LVCMOS pins only. Excludes LVDS pins and test pad pins.

(2) To prevent excess current, the supply voltage delta |V_CCI – V_CC| must be less than the specified limit in Recommended Operating Conditions.