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ZHCSJ27 November 2018 DLP650LNIR

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机械数据 (封装 | 引脚)

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- MCLG035

散热焊盘机械数据 (封装 | 引脚)

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7.3.4.1.3.2 DLPC410 to DLPA200 IO Description

The Serial Communications Port (SCP) is a full duplex, synchronous, character-oriented (byte) port that allows exchange of commands from the DLPC410 to the DLPA200. One SCP bus is used for the DLP650LNIR.

Figure 13. Serial Port System Configuration

Five signal lines are associated with the SCP bus: SCPEN, SCPCK, SCPDI, SCPDO, and IRQ.

Table 6 lists the available controls and status pin names and their corresponding signal type, along with a brief functional description.

Table 6. DLPC410 to DLPA200 I/O Pin Descriptions

PIN NAME	DESCRIPTION	I/O
A_SCPEN	Active-low chip select for DLPA200 serial bus	O
A_STROBE	DLPA200 control signal strobe	O
A_MODE(1:0)	DLPA200 mode control	O
A_SEL(1:0)	DLPA200 select control	O
A_ADDR(3:0)	DLPA200 address control	O
B_SCPEN	Active-low chip select for DLPA200 serial bus (2)	O
B_STROBE	DLPA200 control signal strobe (2)	O
B_MODE(1:0)	DLPA200 mode control	O
B_SEL(1:0)	DLPA200 select control	O
B_ADDR(3:0)	DLPA200 address control	O

The DLPA200 provides a variety of output options to the DMD by selecting logic control inputs: MODE[1:0], SEL[1:0] and reset group address A[3:0] (Table 6). The MODE[1:0] input determines whether a single output, two outputs, four outputs, or all outputs, are selected. Output levels (VBIAS, VOFFSET, or VRESET) are selected by SEL[1:0] pins. Selected outputs are tri-stated on the rising edge of the STROBE signal and latched to the selected voltage level after a break-before-make delay. Outputs remain latched at the last micromirror clocking pulse waveform level until the next micromirror clocking pulse waveform cycle.