B. To prevent excess current, the
supply voltage difference |V
BIAS – V
OFFSET| must be less
than the specified limit in
Section 6.4.
C. To prevent excess current, the
supply difference |V
BIAS – V
RESET| must be less than the
specified limit in
Section 6.4.
H. V
DD must remain
powered on and stable until after V
OFFSET, V
BIAS, and
V
RESET are powered off, per t
DELAY3 specification in
Section 9.1.
I. To prevent excess current, the
supply voltage delta |V
DDA – V
DD| must be less than
specified limit in
Section 6.4.