ZHCSFY9 February   2017 DLPA100

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1. 3.1 典型应用图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Storage Conditions
    3. 6.3 ESD Ratings
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Up Sequencing
      2. 7.3.2  Power Down Sequencing
      3. 7.3.3  Shutdown
        1. 7.3.3.1 Thermal
      4. 7.3.4  System Reset
      5. 7.3.5  Interrupt Logic
      6. 7.3.6  Serial Communications Port
      7. 7.3.7  Switching Regulators
        1. 7.3.7.1 Output Voltage - VOUT
        2. 7.3.7.2 Adjustable Linear Regulator - VLIN1
        3. 7.3.7.3 Adjustable Linear Regulator Control - VLIN2
      8. 7.3.8  Fan Controllers
      9. 7.3.9  Color Wheel Motor Driver
        1. 7.3.9.1 Color Wheel Motor Driver Power Dissipation
      10. 7.3.10 Color Wheel Switching Regulator Supply
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Grounding Guidelines
      1. 10.2.1 Completely Isolated Ground Regions
      2. 10.2.2 Single Isolated Ground Region
      3. 10.2.3 Non-isolated Common Ground Region
    3. 10.3 Thermal Guidelines
    4. 10.4 Motor Control Guidelines
    5. 10.5 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件标记
    2. 11.2 文档支持
      1. 11.2.1 相关文档　
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
  • DLP|48
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER MIN MAX UNIT
VBB Load Supply Voltage 15 V
tramp Time to ramp from 0V to VBB 200 µs
Vx LX33, LXC, LX5, OUTA, OUTB, OUTC -1 V
Vin Logic Inputs (RESETZ, CLK, DIN, CSZ, OSC) -0.3 7 V
Vout Open Drain Logic Outputs (PWRGOOD, DOUT, POSENSE, PMDINTZ, TACH) 7 V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 Storage Conditions

MIN MAX UNIT
Tstg Storage temperature -55 150 °C

6.3 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VBB Load supply voltage 15 V
Ta Operational ambient temperature 0 75 °C
Tj Maximum Operational junction temperature 150 °C

6.5 Thermal Information

THERMAL METRIC(1) DLPA100 UNIT
LQFP
48 PINS
RθJA Junction-to-ambient thermal resistance 23 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 2 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.6 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IBB1 Supply Current Motors and fans off 26 mA
IBB2 Supply Current All Regulators Operating, I_load= 0 mA 36 mA
IBB3 Supply Current x3 fans = 100% mode @ 200 mA load, VM = 100% mode @ 200 mA 2.7 A
CONTROL LOGIC
VIL Logic Input Voltage (RESETZ, CLK, DIN, CSZ, OSC) 0.8 V
VIH 2.0 V
IIL Logic Input Current VIN = 5 -20 <1.0 20 µA
IIH VIN = 0 -20 <-1.0 20 µA
Vlow Open Drain Logic Outputs (PWRGOOD, DOUT, POSENSE,PMDINTZ, TACH) I = 4 mA 0.4 V
Iout Logic Output Leakage Current V = 3.3 V 1 µA
CHARGE PUMP
VCP Output Voltage Relative to VBB 7.25 V
VCPuvlo VCP Undervoltage 5.5 V
SWITCHING REGULATORS
V5 Output Voltage V5 Average Voltage, I_out = 0 mA to 1.6 A 4.75 5 5.25 V
Rds5 Buck Switch Rdson Tj = 25°C 150 mΩ
Icl5 Buck Switch Current Limit 2.8 3.4 4.0 A
Fsw Switching Frequency 450 500 525 kHz
tss Soft Start 3 5 7 ms
V33 Output Voltage V3P3 Average Voltage, I_out = 0 mA to 1.6 A 3.168 3.3 3.432 V
Rds33 Buck Switch Rdson Tj = 25°C 300 mΩ
Icl33 Buck Switch Current Limit 2.4 2.8 3.4 A
Fsw Switching Frequency 450 500 525 kHz
tss Soft Start 3 5 7 ms
Vcore Output Voltage VCORE Range 1.0 3.3 V
Vc1 Output Voltage VCORE Average Voltage, I_out = 200 mA to 3.7 A, using 0.5% tolerance feedback resistors -4.0 4.0 V
Vc2 Output Voltage VCORE Average Voltage, I_out = 0 mA to 200 mA, using 0.5% tolerance feedback resistors -4.0 6.0 V
Iclc Buck Switch Current Limit Isense Resistor = 100 mΩ 4.8 5.5 6.5 A
TRISE Gate Drive Rise Time Cl = 500 pF, Vgs = 7 V (10% to 90%) 40 ns
TFALL Gate Drive Fall Time Cl = 500 pF, Vgs = 0 V (90% to 10%) 40 ns
Fsw Switching Frequency 450 500 525 kHz
tss Soft Start 3 5 7 ms
V25 Output Voltage V2P5 Average Voltage, I_out = 0 mA to 1.2 A 2.4 2.5 2.6 V
Rds5 Buck Switch Rdson Tj = 25°C 300 mΩ
Icl5 Buck Switch Current Limit 1.7 2.1 2.5 A
Fsw Switching Frequency 450 500 525 kHz
tss Soft Start 3 5 7 ms
LINEAR REGULATORS
Output Voltage VLIN1 Range 1.0 3.3 V
Vout Output Voltage VLIN1 Average voltage relative to target, I _load =2 mA to 75 mA, using 0.5% tolerance feedback resistors -3% 3%
ILIM VLIN1 Current Limit 100 150 mA
RR Ripple rejection f = 120 Hz, Cout = 10 µF 60 dB
IFB Feedback Input Bias Current -400 -100 100 nA
tss Soft Start 3 5 7 ms
VLIN2 External FET Supply Voltage 1.7 5.5 V
Output Voltage VLIN2 Range 1.0 3.3 V
Vout Output Voltage VLIN1 Average voltage relative to target, I _load = 10 mA to 1.2 mA, using 0.5% tolerance feedback resistors -3% 3%
RR Ripple rejection f = 120 Hz, Cout = 10 µF 60 dB
IFB Feedback Input Bias Current -400 -100 100 nA
tss Soft Start 3 5 7 ms
FAN CONTROLLERS
Fpwm PWM switching frequency Controlled by DLPC4422 Software 100 kHz
Fpwm PWM switching frequency Controlled by DLPC4422 Software 24 Hz
Duty Cycle LSB 500 ns
Rds Rdson Buck Switch I = 200 mA 1 Ω
Current Limit 550 875 mA
Current Limit Blanking Controlled by DLPC4422 Software 20 µs
COLOR WHEEL SWITCHING REGULATOR SUPPLY
VM Output Voltage Average Voltage, I_out = 0 mA to maximum programmed load current. Buck inductor = 33 µH -5% 5%
Rds Buck Switch Rdson Tj = 25°C 500 mΩ
Icl Buck Switch Current Limit relative to target programmed value -20% 0% 20%
Toff Fixed off-time VM >6 V 1.33 µs
Toff Fixed off-time 2.6 V < VM <4.0 V 4.7 µs
Toff Fixed off-time VM < 1.5 V 17 µs
tss Soft Start
COLOR WHEEL MOTOR DRIVER
Pdm Power Dissipation 1.0 W
Rdson Source Driver Rdson I = 1 A 400 600 mΩ
Rdson Sink Driver I = 1 A 500 700 mΩ
Im Drive Current 1.4 A
Ib Brake Current 2.5 A
Tb Brake Period For brake current to change from maximum value (2.5 A) to the maximum drive current (1.4 A) 800 ms
Kgm Gm Constant Controlled by DLPC4422 Software 125
Controlled by DLPC4422 Software 250
Vos Offset 0.5 V
Bemf Comp Hysteresis Vctap = 1.5 V to 6 V 5 20 35 mV
Fosc OSC (Motor Oscillator) 5 MHz
Th OSC High Period 100 ns
TI OSC Low Period 100 ns
MOTOR CHARACTERISTICS
Rload Load Resistance Phase to Phase 1.5 15 Ω
# Poles 4 12 16 Poles
Speed Poles = 12 or 16 2880 7200 11160 rpm
Poles = 4 or 8 2880 7200 14880 rpm
Commutation Period - (60/[Speed(rpm) × 3 × #Poles]) 4-Pole at 2880 rpm 1736 µs
16-Pole at 11160 rpm 112 µs
L/R Time Constant - Phase to Phase inductance divided by Phase-to-Phase resistance 4-Pole at 14880 rpm 112 µs
8-Pole at 14880 rpm 56 µs
12-Pole at 11160 rpm 50 µs
16-Pole at 11160 rpm 37 µs
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