ZHCSCO5B June 2014 – February 2018 DLPA2000
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLIES | ||||||
INPUT VOLTAGE | ||||||
VI | Input voltage range | VINA, VINR, VINL, VINC | 2.7 | 3.6 | 6 | V |
Extended input voltage range(1) | 2.3 | 3.6 | 6 | |||
VLOW_BAT | Low-battery warning threshold | VINA falling | 3 | V | ||
Hysteresis | VINA rising | 100 | mV | |||
Vhys(UVLO) | Undervoltage lockout threshold | VINA falling (through 5-bit trim function) | 2.3 | 4.5 | V | |
Hysteresis | VINA rising | 100 | mV | |||
VSTARTUP | Startup voltage | VBIAS, VOFS, VRST; loaded with 2 mA | 2.5 | V | ||
INPUT CURRENT | ||||||
IQ | ACTIVE mode | Motor current excluded | 15 | mA | ||
ISTD | STANDBY mode | 900 | µA | |||
IIDLE | IDLE mode | 10 | µA | |||
INTERNAL SUPPLIES | ||||||
VV6V | Internal supply, analog | 6.25 | V | |||
CLDO_V6V | Filter capacitor for V6V LDO | 100 | nF | |||
VV2V5 | Internal supply, logic | 2.5 | V | |||
CLDO_V2V5 | Filter capacitor for V2V5 LDO | 2.2 | µF | |||
DMD REGULATOR | ||||||
RDS(ON) | MOSFET ON-resistance | Switch E (from VINR to SWN) | 1000 | mΩ | ||
Switch F (from SWP to PGNDR) | 320 | |||||
VFW | Forward voltage drop | Switch G(2) (from SWP to VBIAS)
VINR = 5 V, VSWP = 2 V, IF = 100 mA |
1.3 | V | ||
Switch H (from SWP to VOFS)
VINR = 5 V, VSWP = 2 V, IF = 100 mA |
1.3 | |||||
tDIS | Rail discharge time | VIN = 2.9 V; COUT = 110 nF | 40 | µs | ||
tPG | Power-good timeout | Not tested in production | 6 | ms | ||
ILIMIT | Switch current limit | 312 | mA | |||
L | Inductor value | 10 | µH | |||
VOFS REGULATOR | ||||||
VOFS | Output voltage | 10 | V | |||
DC output voltage accuracy | IOUT = 2 mA | –2% | 2% | |||
DC load regulation | VIN = 3.6 V, IOUT = 0 to 2 mA | –19 | V/A | |||
DC line regulation | VINA, VINL, VINR, VINC 2.7 to 6.0 V, IOUT = 2 mA | 35 | mV/V | |||
VRIPPLE | Output ripple | VIN = 3.6 V, IOUT = 2 mA, COUT = 440 nF(3) | 375 | mVpp | ||
IOUT | Output current | 0 | 3 | mA | ||
PG | Power-good threshold
(fraction of nominal output voltage) |
VOFS rising | 86% | |||
VOFS falling | 66% | |||||
RDIS | Output discharge resistor | Active when rail is disabled | 100 | Ω | ||
COUT | Output capacitor | Recommended value (output capacitors for VOFS/VBIAS must be equal) | 110 | 220 | nF | |
tDISCHARGE< 40 µs at 2.9 V | 100 | 110 | nF | |||
VBIAS REGULATOR | ||||||
VBIAS | Output voltage | 18 | V | |||
DC output voltage accuracy | IOUT = 2 mA | –2% | 2% | |||
DC load regulation | VIN = 3.6 V, IOUT = 0 to 2 mA | –14 | V/A | |||
DC line regulation | VINA, VINL, VINR, VINC 2.7 to 6 V,
IOUT = 2 mA |
18 | mV/V | |||
VRIPPLE | Output ripple | VIN = 3.6 V, IOUT = 2 mA, COUT = 440 nF (see (3)) | 375 | mVpp | ||
IOUT | Output current | 0 | 4 | mA | ||
PG | Power-good threshold
(fraction of nominal output voltage) |
VBIAS rising | 86% | |||
VBIAS falling | 66% | |||||
RDIS | Output discharge resistor | Active when rail is disabled | 100 | Ω | ||
COUT | Output capacitor | Recommended value (output capacitors for VOFS / VBIAS must be equal) | 110 | 220 | nF | |
tDISCHARGE< 40 µs at 2.9 V | 100 | 110 | ||||
VRST REGULATOR | ||||||
VRST | Output voltage | –14 | V | |||
DC output voltage accuracy | IOUT = 2 mA | –3% | 3% | |||
DC load regulation | VIN = 3.6 V, IOUT = 0 to 2 mA | 13 | V/A | |||
DC line regulation | VINA, VINL, VINR, VINC 2.7 to 6 V,
IOUT = 2 mA |
–21 | mV/V | |||
VRIPPLE | Output ripple | VIN = 3.6 V, IOUT = 2 mA, COUT = 440 nF (see (3)) | 375 | mVpp | ||
VREF_VRST | Reference voltage | 500 | mV | |||
IOUT | Output current | 0 | 4 | mA | ||
PG | Power-good threshold (fraction of nominal output voltage) | VRST rising | 90% | |||
VRST falling | 90% | |||||
RDIS | Output discharge resistor | Active when rail is disabled | ±150 | Ω | ||
COUT | Output capacitor | 110 | 220 | nF | ||
tDISCHARGE< 70 µs at VBAT ≥ 2.7 V | 100 | 110 | ||||
LED DRIVER | ||||||
VLED BUCK-BOOST | ||||||
VLED | Output voltage range | 1.2 | 5.5 | V | ||
Default output voltage | SW4, SW5, SW6 in OPEN position | 3.5 | ||||
VOVP | Output overvoltage protection | Clamps buck-boost output | 5.5 | 7 | V | |
VLED_OVP | Fault detection threshold | Triggers VLED_OVP interrupt | 5.4 | V | ||
ISW | Switch current limit | 3.5 | 4.0 | 4.5 | A | |
RDS(ON) | MOSFET ON-resistance | Switch A (from VINL to L1) | 50 | mΩ | ||
Switch B (from L1 to PGNDL) | 50 | |||||
Switch C (from L2 to PGNDL) | 50 | |||||
Switch D (from L2 to VLED) | 50 | |||||
ƒSW | Switching frequency | 2.25 | MHz | |||
COUT | Output capacitance | 2 × 22 | µF | |||
RGB STROBE CONTROLLER SWITCHES | ||||||
RDS(ON) | Drain-source ON-resistance | SW4, SW5, SW6 | 30 | 75 | mΩ | |
ILEAK | OFF-state leakage current | VDS = 5.0 V | 1 | µA | ||
LED CURRENT CONTROL | ||||||
Vf | LED forward voltage | 4.8 | V | |||
ILED | DLPA2000 LED currents | VIN ≥ 2.3 V, VLED ≤ 4.8 V
RLIM = 100 mΩ, 0.1%, TA = 25°C (see register settings) Current at minimum code 0x00Ch for SWx IDAC[9:0]. |
25 | mA | ||
VIN ≥ 2.3 V, VLED ≤ 4.8 V
RLIM = 100 mΩ, 0.1%, TA = 25°C (see register settings) Current at maximum code 0x307h for SWx_IDAC[9:0]. |
750 | |||||
DC current accuracy, SW4, 5, 6 | RLIM = 100 mΩ | 25 | mA | |||
Transient LED current limit range | ILIM[3:0] = 0000 at RLIM = 100 mΩ | 130 | mA | |||
ILIM[3:0] = 1111 at RLIM = 100 mΩ | 1500 | |||||
trise | Current rise time | ILED from 5% to 95%, ILED = 300 mA,
Transient current limit disabled Not tested in production |
50 | µs | ||
1.1-V REGULATOR | ||||||
VCORE (BUCK) | ||||||
VIN | Input voltage | 2.3 | 6 | V | ||
VOUT | Nominal fixed output voltage | 1.1 | V | |||
DC output voltage accuracy | 0 mA ≤ IOUT ≤ 600 mA at VIN> 2.5 V
VOUT = 1.1 V |
–1.5% | 1.5% | |||
d | Maximum duty cycle | 100% | ||||
RDS(ON) | Low-side MOSFET on-resistance | VIN = 3.6 V, TJ = 27ºC | 185 | 380 | mΩ | |
High-side MOSFET on-resistance | 240 | 480 | mΩ | |||
IOUT | Output current | VIN> 2.3 V | 300 | 600 | mA | |
ILIMIT | Switch current limit | 1 | A | |||
TSS | Soft-start time | Time to ramp from 10% to 90% of VOUT,
VIN = 3.6 V |
250 | µs | ||
COUT | Output capacitance | 10 | µF | |||
L | Nominal Inductance | 2.2 | µH | |||
LOAD SWITCH | ||||||
VIN | Input voltage range | LS_IN | 1.8 | 3.6 | V | |
RDS(ON) | P-channel MOSFET on-resistance | VIN = 1.8 V, over full temperature range | 385 | 505 | mΩ | |
COUT | Output capacitor | Ceramic | 4.7 | 10 | 12 | µF |
ESR of output capacitor | Ceramic | 5 | 20 | 500 | mΩ | |
MEASUREMENT SYSTEM (AFE) | ||||||
G | Amplifier gain (PGA) | AFE_GAIN[1:0] = 01 | 1.0 | V/V | ||
AFE_GAIN[1:0] = 10 | 9.5 | |||||
AFE_GAIN[1:0] = 11 | 18 | |||||
VOFS | Input referred offset voltage | PGA, AFE_CAL_DIS = 1
Not tested in production |
–1 | 1 | mV | |
Comparator
Not tested in production |
–1.5 | 1.5 | ||||
tsettle | Settling time | To 1% of final value
(not tested in production) |
15 | µs | ||
To 0.1% of final value
(not tested in production) |
52 | |||||
ƒsample | Sampling rate | Not tested in production | 19 | kHz | ||
LOGIC LEVELS AND TIMING CHARACTERISTICS | ||||||
VOL | Output low-level | IO = 0.5-mA sink current
(RESETZ, CMP_OUT) |
0 | 0.3 | V | |
IO = 5-mA sink current
(SPI_DOUT, INTZ) |
0 | 0.3 × VSPI | ||||
VOH | Output high-level | IO = 0.5-mA source current
(RESETZ, CMP_OUT) |
1.3 | 2.5 | V | |
IO = 5-mA source current
(SPI_DOUT) |
0.7 × VSPI | VSPI | ||||
VIL | Input low-level | PROJ_ON, LED_SEL0, LED_SEL1 | 0 | 0.4 | V | |
SPI_CSZ, SPI_CLK, SPI_DIN | 0 | 0.3 × VSPI | ||||
VIH | Input high-level | PROJ_ON, LED_SEL0, LED_SEL1 | 1.2 | V | ||
SPI_CSZ, SPI_CLK, SPI_DIN | 0.7 × VSPI | VSPI | ||||
IBIAS | Input bias current | VIO = 3.3 V, any input pin | 0.5 | µA | ||
tDEGLITCH | Deglitch time | PROJ_ON,
(not tested in production) |
1 | ms | ||
LED_SEL0, LED_SEL1 pins
(not tested in production) |
300 | ns | ||||
INTERNAL OSCILLATOR | ||||||
ƒOSC | Oscillator frequency | 9 | MHz | |||
Frequency accuracy | TA = –30 to 85°C | –10% | 10% | |||
THERMAL SHUTDOWN | ||||||
TWARN | Thermal warning (HOT threshold) | 120 | °C | |||
Hysteresis | 10 | |||||
TSHTDWN | Thermal shutdown (TSD threshold) | 150 | °C | |||
Hysteresis | 15 | |||||
MOTOR DRIVER | ||||||
POWER SUPPLY | ||||||
VINM | Operating motor supply voltage | 2 | 6 | V | ||
IM | Operating motor current | 500(4) | mA | |||
H-BRIDGE FETS | ||||||
RDS(ON) | HS + LS FET on resistance | VV2V5 = 2.5 V, VM = 3 V, IO = 200 mA,
TJ = 25°C |
1.9 | 2.1 | Ω | |
IOFF | Off-state leakage current | ±200 | nA | |||
MOTOR DRIVER PROTECTION CIRCUITS | ||||||
IOCP | Overcurrent protection trip level per A-out or B-out pin | 0.53 | 1.16 | A | ||
tTSD | Thermal shutdown temperature | Die temperature | 150 | 160 | 180 | °C |