7.3.1 DMD Regulators

DLPA2000 contains three switch-mode power supplies that power the DMD. These rails are V_OFS, V_BIAS, and V_RST. After pulling the PROJ_ON pin high, the DMD is first initialized followed by a power-up of the V_OFS line after a small delay of less than 10 ms followed by V_BIAS and V_RST with an additional delay of 145 ms. The LED driver and STROBE DECODER circuit can only be enabled after all three rails are enabled. There are two power-down sequences, the normal power-down timing initiated after pulling the PROJ_ON pin low, and a fast power-down mode where if any one of the rails encounters a fault such as an output short, all three rails are discharged simultaneously. The detailed power-up and power-down diagrams are shown in Figure 4 and Figure 5.

Figure 4. Power Sequence Normal Shutdown Mode

A. If the FAULT condition happens and its associated interrupt is masked in the interrupt mask register (0Dh), the INTZ does not go low, but all other timing shown in the diagram is unaffected.

Figure 5. Power Sequence Fault Shutdown Mode