ZHCSOK9A october 2021 – june 2023 DLPA300
PRODUCTION DATA
For the correct operation of a display system based on the 9-μm pixel family of DMDs, the DLPA300 micromirror driver must be controlled by the DLPC4420 or DLPC4430 display controller. The embedded software in the DLPC4430 or DLPC4420 display controller coordinates the video data to the DMD and the bias, offset and reset waveforms created by the DLPA300 micromirror driver that are input to the MBRST pins on the DMD. This results in the highest possible image quality and system efficiency.
The key design requirements are power supply sequencing for power up and power down. The 9-μm family of DMDs require that the VCC2 supply be turned on after the 1.8-V supply is full on and stable. Similarly, on power down, the DMDs require that the VCC2 supply be full off before the 1.8-V supply is begins its power off ramp.
The DLPA300 micromirror driver imparts one power supply sequencing constraint. Because VRESET is generated by an external supply, the DLPC4430 display controller cannot control this supply directly by software. Therefore, it is necessary to use the VBIAS supply to control the power up and power down of the external VRESET power supply.
These power supply sequencing requirements necessitate external circuitry to control the VRESET and VCC2 power supply sequencing, as seen in Figure 8-1.