The DLPC4430 or DLPC4420 display controller configures the V_BIAS and V_OFFSET voltage regulators in the DLPA300 micromirror driver through the SCP bus. V_BIAS is then used to generate the enable signal for the V_RESET external voltage regulator, LM43601 step-down voltage converter. When the V_BIAS is enabled, it turns on the two-transistor buffer amplifier. The 2N7002 and BSS84-7-F FETs isolate V_BIAS from the V_{RESET_RAIL} and shift the voltage reference to V_{RESET_RAIL}.

The thermal pad on the DLPA300 micromirror controller and the LM43601 step-down voltage converter are electrically connected to the V_{RESET_RAIL}. Furthermore, the AGND and PGND pins on the LM43601 step-down voltage converter are also connected to the V_{RESET_RAIL}. Therefore, the logic levels and analog voltage levels for LM43601 step-down voltage converter are referenced to the –16.5-V V_{RESET_RAIL}.

The LM43601 data sheet provides details for the component selection for the components in the voltage regulator circuit connected to the V_{RESET_RAIL}. The output of the regulator is set to the VRESET value of –16.5 V. The selection of the resistors in the resistor divider sets the output voltages, 6.49 kΩ and 100 kΩ.

The DLP780NE power sequencing requires that the VCC2 power supply ramps up after the 1.8-V supply is powered on and stable, and V_OFFSET is powered up and stable. The two conditions are met by the wired-or of the ERROR signal from the LP38513-1.8 ultra-low dropout linear regulator and an enable signal generated from V_OFFSET. The 2N7002 enhancement mode FET acts as an inverter and level shifter from V_OFFSET to a 3.3-V logic level.

In the event of a power supply failure (such as a pull-the-plug event), VCC2 must be driven low before the 1.8-V supply starts to drop voltage. To achieve this, the TPS3847 12-V voltage monitor triggers a shunt-to-ground power FET to pull VCC2 to ground.