ZHCSE87A October 2015 – September 2023 DLPA3000
PRODUCTION DATA
SYSPWR is the main supply of the DLPA3000. It can range from 6 V to 20 V, where the typical is 12 V. At power-up, several (internal) power supplies are started one after the other to make the system work correctly (Figure 8-1). A sequential startup provides that all the different blocks start in a certain order and prevent excessive startup currents. The main control to start the DLPA3000 is the control pin PROJ_ON. Once set high, the basic analog circuitry is started, which is needed to operate the digital and SPI interface. This circuitry is supplied by two LDO regulators that generate 2.5 V (SUP_2P5V) and 5 V (SUP_5P0V). These regulator voltages are for internal use only and not loaded by an external application. The output capacitors of those LDOs must be 2.2 µF for the 2.5 V LDO and 4.7 µF for the 5 V LDO, pin 91 and 92, respectively. Once these are up the digital core is started, and the DLPA3000 Digital State Machine (DSM) takes over.
Subsequently, the 5.5 V LDOs for various blocks are started: PWR_5V5V, DRST_5P5V and ILLUM_5P5V. Next, the buck converters and DMD LDOs are started (PWR_1 to PWR_4). The DLPA3000 is now awake and ready to be controlled by the DLPC (indicated by RESET_Z going high).
Lastly, the general purpose buck converters (PWR_6) can be started (if used) as well as the regulator that supplies the DMD. The DMD regulator generates the timing critical VOFFSET, VBIAS, and VRESET supplies.