ZHCSHH9D January 2017 – August 2021 DLPC3437
PRODUCTION DATA
An external power monitor is required to hold the DLPC34xx controller in system reset during the power-up sequence by driving RESETZ to a logic-low state. It shall continue to drive RESETZ low until all controller voltages reach the minimum specified voltage levels, PARKZ goes high, and the input clocks are stable. The external power monitoring is automatically done by the DLPAxxxx PMIC.
No signals output by the DLPC34xx controller will be in their active state while RESETZ is asserted. The following signals are tri-stated while RESETZ is asserted:
Add external pullup (or pulldown) resistors to all tri-stated output signals (including bidirectional signals to be configured as outputs) to avoid floating controller outputs during reset if they are connected to devices on the PCB that can malfunction. For SPI, at a minimum, include a pullup to any chip selects connected to devices. Unused bidirectional signals can be configured as outputs in order to avoid floating controller inputs after RESETZ is set high.
The following signals are forced to a logic low state while RESETZ is asserted and the corresponding I/O power is applied:
After power is stable and the PLL_REFCLK_I clock input to the DLPC34xx controller is stable, then RESETZ should be deactivated (set to a logic high). The DLPC34xx controller then performs a power-up initialization routine that first locks its PLL followed by loading self configuration data from the external flash. Upon release of RESETZ, all DLPC34xx I/Os will become active. Immediately following the release of RESETZ, the HOST_IRQ signal will be driven high to indicate that the auto initialization routine is in progress. However, since a pullup resistor is connected to signal HOST_IRQ, this signal will have already gone high before the controller actively drives it high. Upon completion of the auto-initialization routine, the DLPC34xx controller will drive HOST_IRQ low to indicate the initialization done state of the controller has been reached.
To ensure reliable operation, during the power-up initialization sequence, GPIO_08 (PROJ_ON) must not be deasserted. In other words, once the startup routine has begun (by asserting PROJ_ON), the startup routine must complete (indicated by HOST_IRQ going low) before the controller can be commanded off (by deasserting PROJ_ON).
No I2C or DSI (if applicable) activity is permitted until HOST_IRQ goes low.